5秒后页面跳转
捷配首页

Datasheet > AD1317KZ
AD1317KZ PDF预览

AD1317KZ

更新时间： 2024-02-26 16:32:52
品牌 Logo 应用领域
亚德诺 - ADI 锁存器比较器
页数 文件大小 规格书
12页 287K
描述
Ultrahigh Speed Window Comparator with Latch

阅读下载

获取价格

AD1317KZ 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：GULLWING, HERMETIC SEALED, SMT-16针数：16
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.84
放大器类型：COMPARATOR25C 时的最大偏置电流 (IIB)：33 µA
最大输入失调电压：10000 µVJESD-30 代码：S-CDSO-G16
JESD-609代码：e0长度：11.43 mm
负供电电压上限：-9 V标称负供电电压 (Vsup)：-5.2 V
功能数量：1端子数量：16
最高工作温度：70 °C最低工作温度：
输出类型：OPEN-EMITTER封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：SOP封装等效代码：SOP16,.7
封装形状：SQUARE封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：220电源：10,-5.2 V
认证状态：Not Qualified标称响应时间：1.8 ns
座面最大高度：3.38 mm子类别：Comparators
供电电压上限：12 V标称供电电压 (Vsup)：10 V
表面贴装：YES温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：11.43 mm

AD1317KZ 数据手册

 浏览型号AD1317KZ的Datasheet PDF文件第1页浏览型号AD1317KZ的Datasheet PDF文件第3页浏览型号AD1317KZ的Datasheet PDF文件第4页浏览型号AD1317KZ的Datasheet PDF文件第5页浏览型号AD1317KZ的Datasheet PDF文件第6页浏览型号AD1317KZ的Datasheet PDF文件第7页 
AD1317–SPECIFICATIONS (All specifications at +25؇C, free air. Outputs terminated into 50 ⍀ to –2 V,  
with + VS = +10 V, –VS = 5.2 V unless otherwise noted)  
AD1317KZ  
Typ  
Parameter  
Symbol  
Min  
Max  
Units  
Comments  
DC INPUT CHARACTERISTICS  
Offset Voltage  
Offset Drift  
VINA/B Bias Currents  
Active  
Inhibit  
VOS  
dVOS/dT  
–10  
10  
mV  
µV/°C  
CMV = 0 V  
–2 V to +7 V  
20  
Ibca  
Ibci  
10  
50  
33  
µA  
pA  
VINA, VINB Bias Currents  
Active  
–2 V to +7 V  
Ibsa  
5
16.5  
µA  
Inhibit  
Ibsi  
50  
4
8
pA  
VINA/B Resistance  
VINA, VINB Resistance  
Capacitance VINA/B, VINA, VINB  
Voltage Range  
Differential Voltage  
Common-Mode Rejection Ratio  
Rinc  
Rins  
CIN  
VCM  
VDIFF  
CMRR  
MΩ  
MΩ  
pF  
Volts  
Volts  
dB  
1.5  
2.0  
7
9
–2  
70  
See Note 5  
80  
–2 V to +7 V  
LATCH ENABLE INPUTS  
Input Voltage, Any Input  
Differential Voltage  
Logic “1” Current  
–2.0  
0.4  
5.0  
4
10  
Volts  
Volts  
µA  
IIH  
IIL  
Logic “0” Current  
–200  
µA  
Capacitance  
4
pF  
INPUT ENABLE CURRENTS  
Input Voltage, Any Input  
Differential Voltage  
Logic “1” Current  
–2.0  
0.4  
5.0  
4
20  
Volts  
Volts  
µA  
IIH  
IIL  
Logic “0” Current  
–200  
µA  
Capacitance  
4
pF  
DIGITAL OUTPUTS  
Logic “l” Voltage  
Logic “0” Voltage  
VOH  
VOL  
–0.98  
Volts  
Volts  
–1.50  
SWITCHING PERFORMANCE  
Propagation Delays  
Input to Output  
Latch Enable to Output  
Active to Inhibit  
Inhibit to Active  
Propagation Delay T.C.  
Dispersion  
See Figure 3  
tPDR, tPDF  
1.8  
2.0  
2.5  
15  
5
2.8  
2.5  
ns  
ns  
ns  
ns  
See Note 1  
See Note 1  
See Note 2  
See Note 3  
tLO  
tIN  
tIE  
ps/°C  
See Note 4  
5 V Signal  
See Figure 1  
All Edges  
Rising Edge  
Falling Edge  
1 V Signal  
All Edges  
Rising Edge  
Falling Edge  
450  
350  
350  
600  
400  
ps  
ps  
ps  
See Figure 2  
250  
200  
200  
ps  
ps  
ps  
LATCH TIMING  
Input Pulse Width  
Setup Time  
tPW  
tS  
tH  
2.5  
1.5  
0
1.0  
0.4  
ns  
ns  
ns  
Hold Time  
POWER SUPPLIES  
–VS to +VS Range  
Positive Supply  
Negative Supply  
Positive Supply Current  
Negative Supply Current  
PSRR  
15.2  
10.0  
–5.2  
50  
–70  
75  
15.6  
11.0  
–4.2  
70  
See Note 5  
+VS  
–VS  
I+  
8.0  
–7.2  
Volts  
Volts  
mA  
mA  
dB  
I–  
–100  
65  
Measured at ±2.5% of +VS and –VS  
NOTES  
1Propagation Delay is measured from the input threshold crossing at the 50% point of a 0 V to 5 V input to the output Q and Q crossing.  
2Propagation Delay is measured from the input crossing of IE and IE to when the input bias currents drop to 10% of their nominal value.  
3Propagation Delay is measured from the input crossing of IE and IE to when the input bias currents rise to 90% of their nominal value.  
4Dispersion is measured with input slew rates of 0.5 V/ns and 2.5 V/ns for 5 V swings, 0.5 V/ns and 1 V/ns for 1 V swings.  
5The comparator input voltage range is specified for –2 V to +7 V for typical power supply values of -5.2 V and +10.0 V but can be offset for different input ranges such as –1 V to  
+8 V with power supplies of –4.2 V and +11 V, as long as the required headroom of 3 V is maintained between both VH and +VS and VL and +VS.  
Specifications subject to change without notice.  
–2–  
REV. A  
1234567...12

下载PDF

与AD1317KZ相关器件

型号 品牌 描述 获取价格 数据表
AD131III ETC TRANSISTOR | BJT | PNP | 45V V(BR)CEO | 3A I(C) | TO-3

获取价格
AD131IV ETC TRANSISTOR | BJT | PNP | 45V V(BR)CEO | 3A I(C) | TO-3

获取价格
AD131V ETC TRANSISTOR | BJT | PNP | 45V V(BR)CEO | 3A I(C) | TO-3

获取价格
AD1321KZ ETC Pin ATE Driver

获取价格
AD1322BKZ ADI IC 0.085 A BUF OR INV BASED PRPHL DRVR, CDSO16, HERMETIC SEALED, GULL WING, CERAMIC, LCC-1

获取价格
AD1322KZ ETC Pin ATE Driver

获取价格

与AD1317KZ相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证