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ACT139M PDF预览

ACT139M

更新时间: 2024-01-25 08:04:40
品牌 Logo 应用领域
德州仪器 - TI 解码器解复用器
页数 文件大小 规格书
10页 319K
描述
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

ACT139M 数据手册

 浏览型号ACT139M的Datasheet PDF文件第2页浏览型号ACT139M的Datasheet PDF文件第3页浏览型号ACT139M的Datasheet PDF文件第4页浏览型号ACT139M的Datasheet PDF文件第5页浏览型号ACT139M的Datasheet PDF文件第6页浏览型号ACT139M的Datasheet PDF文件第7页 
CD54ACT139, CD74ACT139  
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS  
SCHS337 – MARCH 2003  
CD54ACT139 . . . F PACKAGE  
CD74ACT139 . . . E OR M PACKAGE  
(TOP VIEW)  
AC Types Feature 1.5-V to 5.5-V Operation  
and Balanced Noise Immunity at 30% of the  
Supply Voltage  
Buffered Inputs  
1G  
1A  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
2G  
2A  
2B  
Incorporate Two Enable Inputs to Simplify  
Cascading and/or Data Reception  
1B  
1Y0  
1Y1  
1Y2  
1Y3  
GND  
Speed of Bipolar F, AS, and S, With  
Significantly Reduced Power Consumption  
12 2Y0  
11  
10  
9
2Y1  
2Y2  
2Y3  
Balanced Propagation Delays  
±24-mA Output Drive Current  
– Fanout to 15 F Devices  
SCR-Latchup-Resistant CMOS Process and  
Circuit Design  
Exceeds 2-kV ESD Protection Per  
MIL-STD-883, Method 3015  
description/ordering information  
The ’ACT139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 4.5-V to 5.5-V V  
CC  
operation. These devices are designed to be used in high-performance memory-decoding or data-routing  
applications requiring very short propagation delay times. In high-performance memory systems, these  
decoders can be used to minimize the effects of system decoding. When used with high-speed memories  
utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are  
less than the typical access time of the memory. This means that the effective system delay introduced by the  
decoders is negligible.  
The active-low enable (G) input can be used as a data line in demultiplexing applications. These  
decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its  
driving circuit.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – E  
SOIC – M  
CDIP – F  
Tube  
Tube  
CD74ACT139E  
CD74ACT139M  
CD74ACT139E  
–55°C to 125°C  
ACT139M  
Tape and reel CD74ACT139M96  
Tube CD54ACT139F3A  
CD54ACT139F3A  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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