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ACPL-M483 PDF预览

ACPL-M483

更新时间: 2024-01-25 10:37:39
品牌 Logo 应用领域
安华高科 - AVAGO /
页数 文件大小 规格书
12页 219K
描述
Short Maximum Propagation Delays

ACPL-M483 数据手册

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ACPL-M483/P483/W483  
Inverted Logic High CMR Intelligent Power Module  
and Gate Drive Interface Optocoupler  
Data Sheet  
Description  
Features  
The ACPL-M483/P483/W483 fast speed optocoupler  Inverted output type (totem pole output)  
contains a AlGaAs LED and photo detector with built-in  
Schmitt trigger to provide logic-compatible waveforms,  
eliminating the need for additional wave shaping. The  
totem pole output eliminates the need for a pull up  
 Truth Table Guaranteed: Vcc from 4.5 V to 30 V  
 Performance Specified for Common IPM Applications  
Over Industrial Temperature Range.  
resistor and allows for direct drive of Intelligent Power  Short Maximum Propagation Delays  
Module or as a gate driver. Minimized propagation delay  
difference between devices makes these optocouplers  
excellent solutions for improving inverter efficiency  
 Minimized Pulse Width Distortion (PWD)  
 Very High Common Mode Rejection (CMR)  
through reduced switching dead time.  
 Hysteresis  
 Available in SO-5 (ACPL-M483) and Stretched SO-6  
Applications  
package (ACPCL-P483/W483).  
 IPM Interface Isolation  
 Package Clearance/Creepage at 8 mm (ACPL-W483)  
 Safety Approval:  
 Isolated IGBT/MOSFET Gate Drive  
 AC and Brushless DC Motor Drives  
 Industrial Inverters  
– UL Recognized with 5000 V  
minute per UL1577.  
(ACPL-W483) for 1  
rms  
– CSA Approved.  
 General Digital Isolation  
– IEC/EN/DIN EN 60747-5-5 Approved with V  
=
for  
IORM  
Functional Diagram  
567 V  
ACPL-P483 and V  
for ACPL-M483 and V  
= 891 V  
for ACPL-W483,  
peak  
IORM  
peak  
peak  
= 1140 V  
IORM  
ACPL-M483  
under option 060.  
Anode  
1
3
6
5
4
VCC  
Note: A 0.1 F bypass  
capacitor must be con-  
nected between pins Vcc  
and Ground.  
Specifications  
VO  
Cathode  
Ground  
SHIELD  
 Wide operating temperature range: -40°C to 105°C.  
 Maximum propagation delay t /t = 120/120 ns  
PHL PLH  
Truth Table  
 Maximum Pulse Width Distortion (PWD) = 50 ns.  
ACPL-P483 & ACPL-W483  
(Negative Logic)  
 Propagation Delay Difference Min/Max = –100/100 ns  
Anode  
N.C.  
1
2
3
6
5
4
VCC  
LED  
ON  
V
O
LOW  
 Wide Operating V Range: 4.5 to 30 Volts  
CC  
VO  
 30 kV/s minimum common mode rejection (CMR) at  
Cathode  
Ground  
SHIELD  
OFF  
HIGH  
V
= 1000 V.  
CM  
Truth Table Guaranteed:  
Vcc from 4.5 V to 30 V  
CAUTION: It is advised that normal static precautions be taken in handling and assembly  
of this component to prevent damage and/or degradation which may be induced by ESD.  

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