Datasheet > ACNW261L-300E

ACNW261L-300E

更新时间： 2024-01-23 05:04:43

品牌	Logo	应用领域
安华高科 - AVAGO		输出元件光电
页数	文件大小	规格书
17页	507K
描述
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 10Mbps, 0.400 INCH, ROHS COMPLIANT, DIP-8

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技术参数
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ACNW261L-300E 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	0.400 INCH, ROHS COMPLIANT, DIP-8	Reach Compliance Code：	compliant
HTS代码：	8541.40.80.00	风险等级：	1.58
其他特性：	CMOS COMPATIBLE, UL RECOGNIZED, VDE APPROVED	配置：	SINGLE
标称数据速率：	10 MBps	最大正向电流：	0.008 A
最大绝缘电压：	5000 V	JESD-609代码：	e3
安装特点：	THROUGH HOLE MOUNT	元件数量：	1
最大通态电流：	0.01 A	最高工作温度：	105 °C
最低工作温度：	-40 °C	光电设备类型：	LOGIC IC OUTPUT OPTOCOUPLER
最大功率耗散：	0.02 W	标称响应时间：	8e-8 ns
子类别：	Optocoupler - IC Outputs	最小供电电压：	2.7 V
标称供电电压：	5.5 V	表面贴装：	NO
端子面层：	Tin (Sn)	Base Number Matches：	1

ACNW261L-300E 数据手册

Table 1. Eﬀects of Common Mode Pulse Direction on Transient I

LED

If |I | < |I |,

If |I | > |I |,

LP LN

LED I Current

If dV /dt Is:

then I Flows:

and I Flows:

Is Momentarily:

positive (>0)

away from LED

anode through C_LA

away from LED

cathode through C_LC

increased

decreased

negative (<0)

toward LED

anode through C_LA

toward LED

cathode through C_LC

decreased

increased

Glitch free power-up and power-down

Slew-rate controlled output

Upon power-up or power-down of the optocoupler,

Typically, the output slew rate (rise and fall time) will vary

glitches produced in the output are undesirable. Glitches with the output load, as more time is needed to charge up

can lead to false data in the optocoupler application. the higher load. The propagation delay and the PWD will

ACPL-061L/ACPL-C61L/ACNW261L has a feature that

increase with the load capacitance. This will be an issue

holds the output in a known state until VDD is at a safe especially in parallel communication because diﬀerent

level. Figure 14 and 15 show typical output waveforms communication line will have diﬀerent load capacitances.

However, ACPL-061L/ACPL-C61L/ACNW261L has built in

slew-rate controlled feature, to ensure that the output rise

and fall time remain stable across wide load capacitance.

during power-up and power-down.

V_DD2= 2 V (typ)

V_DD2

V_DD2= 1 V (typ)

V_DD2

V_DD2= 1 V (typ)

High

Impedence

Output

High

Impedence

High

Impedence

Output

High

Impedence

discharge delay,

depending on the power

supply slew rate

500 µs

i. LED is oꢀ.

ii. LED is on.

Figure 14. V_DDRamp when LED is oﬀ.

Figure 15. V_DDRamp when LED is on.

For product information and a complete list of distributors, please go to our web site: www.avagotech.com

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.

AV02-3195EN - April 10, 2014

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