Switching Specifications (AC)
Over recommended temperature (T = -40°C to 105°C), V = 5 V, I = 10mA unless otherwise specified. All typicals are
A
CC
F
at T = 25°C, V = 5V.
A
CC
Parameter
Symbol
Min.
Typ.
Max.
Units
Test Conditions
Fig.
Note
Propagation Delay Time to
High Output Level
tPLH
30
50
80
ns
TA = 25 °C
RL = 350 Ω,
CL = 15 pF
6, 7, 8 3, 12
120
80
Propagation Delay Time to
Low Output Level
tPHL
35
55
5
ns
TA = 25 °C
4,12
120
40
Pulse Width Distortion
|tPHL - tPLH
|
ns
ns
RL = 350 Ω,
CL = 15 pF
6, 7,
8, 9
6, 12
Propagation Delay Skew
tpsk
50
5, 6,
12
Output Rise Time (10%-90%) Tr
25
10
30
ns
ns
ns
10
12
12
7
Output Fall Time (10%-90%)
Tf
10
Propagation Delay Time of
Enable from VEH to VEL
tELH
RL = 350ꢀΩ, CL = 15 pF,
VEL = 0 V, VEH = 3V
11, 12
Propagation Delay Time of
Enable from VEL to VEH
tEHL
20
25
ns
RL = 350 Ω, CL = 15 pF,
11, 12
13
8
VEL = 0 V, VEH = 3V
Output High Level Common
Mode Transient Immunity
|CMH|
20
20
kV/μs
VCC = 5 V, IF = 0 mA,
VO(MIN) = 2 V, RL = 350 Ω,
TA = 25 °C, VCM = 1500 V
9, 11,
12
Output Low Level Common
Mode Transient Immunity
|CML|
25
kV/μs
VCC = 5 V, IF = 10 mA,
VO(MAX) = 0.8 V, RL = 350 Ω,
TA = 25 °C, VCM = 1500 V
10, 11,
12
All typicals at T = 25°C.
A
Parameter
Symbol
Min.
Typ.
Max.
Units
Test Conditions
Fig.
Note
Input-Output Insulation
VISO
7500
Vrms
RH < 50% for 1 min.
TA = 25°C
13, 14
Input-Output Resistance
Input-Output Capacitance
Notes:
RI-O
CI-O
1012
Ω
VI-O = 500 V
13
13
0.5
0.6
pF
f = 1 MHz, TA = 25°C
1. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20mA.
2. By passing of power supply line is required, with a 0.1 μF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 15. Total lead
length between both ends of the capacitor and the isolator pins should ot exceed 20 mm.
3. The t
propagation delay is measured from the 5 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the
PLH
output pulse.
5.
t
PSK
is equal to the worst case difference in t
and/or t
that will be seen between units at any given temperature and specified test
PLH
PHL
conditions.
6. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew”for more information.
7. The t enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising
ELH
edge of the output pulse.
8. The t
enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling
EHL
edge of the output pulse.
9. CM is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., V > 2.0 V).
H
O
10. CM is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., V < 0.8 V).
L
O
11. For sinusoidal voltages, (|dV | / dt)
= πf V
CM
max
CM CM(p-p).
12. No external pull up is required for a high logic state on the enable input. If the V pin is not used, tying V to V will result in improved CM
E
E
CC
R
performance.
13. Device considered a two-terminal device: pins 1, 2, 3, 4 and 5 shorted together, and pins 6, 7, 8, 9 and 10 shorted together.
14. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 9000 V for one second (leakage detection
rms
current limit, I ≤ 5 μA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN
I-O
60747-5-5 Insulation Characteristics Table, if applicable.
7
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