Datasheet > AAT1239ITP-1-T1

AAT1239ITP-1-T1

更新时间： 2024-01-12 00:09:45

品牌	Logo	应用领域
ANALOGICTECH		转换器
页数	文件大小	规格书
21页	904K
描述
40V Step-Up Converter for 4 to 10 White LEDs

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AAT1239ITP-1-T1 技术参数

生命周期：	Transferred	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.82

AAT1239ITP-1-T1 数据手册

PRODUCT DATASHEET

AAT1239-1

SwitchReg^TM

40V Step-Up Converter for 4 to 10 White LEDs

The boost converter input current flows during both ON

and OFF switching intervals. The input ripple current is

less than the output ripple and, as a result, less input

capacitance is required.

Selecting the Boost Capacitors

The high output ripple inherent in the boost converter

necessitates low impedance output filtering.

Multi-layer ceramic (MLC) capacitors provide small size

and adequate capacitance, low parasitic equivalent

series resistance (ESR) and equivalent series inductance

(ESL), and are well suited for use with the AAT1239-1

boost regulator. MLC capacitors of type X7R or X5R are

recommended to ensure good capacitance stability over

the full operating temperature range.

PCB Layout Guidelines

Boost converter performance can be adversely affected

by poor layout. Possible impact includes high input and

output voltage ripple, poor EMI performance, and

reduced operating efficiency. Every attempt should be

made to optimize the layout in order to minimize para-

sitic PCB effects (stray resistance, capacitance, and

inductance) and EMI coupling from the high frequency

SW node. A suggested PCB layout for the AAT1239-1

boost converter is shown in Figures 9 and 10. The follow-

ing PCB layout guidelines should be considered:

The output capacitor is sized to maintain the output load

without significant voltage droop (ΔV_OUT) during the

power switch ON interval, when the output diode is not

conducting. A ceramic output capacitor from 2.2μF to

4.7μF is recommended (see Table 5). Typically, 50V

rated capacitors are required for the 40V maximum

boost output. Ceramic capacitors sized as small as 0805

or 1206 are available which meet these requirements.

1. Minimize the distance from Capacitor C1 and C2

negative terminal to the PGND pins. This is espe-

cially true with output capacitor C2, which conducts

high ripple current from the output diode back to the

PGND pins.

2. Minimize the distance between L1 to DS1 and switch-

ing pin SW; minimize the size of the PCB area con-

nected to the SW pin.

3. Maintain a ground plane and connect to the IC PGND

pin(s) as well as the GND terminals of C1 and C2.

4. Consider additional PCB area on DS1 cathode to

maximize heatsinking capability. This may be neces-

sary when using a diode with a high V_Fand/or ther-

mal resistance.

5. To avoid problems at startup, add a 10kΩ resistor

between the VIN, VP and EN/SET pins (R4). This is

critical in applications requiring immunity from input

noise during “hot plug” events, e.g. when plugged

into an active USB port.

MLC capacitors exhibit significant capacitance reduction

with applied voltage. Output ripple measurements should

confirm that output voltage droop and operating stability

are acceptable. Voltage derating can minimize this fac-

tor, but results may vary with package size and among

specific manufacturers.

Output capacitor size can be estimated at a switching

frequency (F_S) of 500kHz (worst case).

I_OUT· D_MAX

C_OUT

F_S· ΔV_OUT

To maintain stable operation at full load, the output

capacitor should be sized to maintain ΔV_OUTbetween

100mV and 200mV.

Manufacturer

Part Number

Value (μF)

Voltage Rating

Temp Co

Case Size

Murata

GRM188R60J225KE19

GRM188R61A225KE34

GRM21BR71E225KA73L

GRM31CR71H225KA88

GRM31CR71H475K

2.2

4.7

6.3

X5R

X7R

0603

0805

1206

Table 5: Recommended Ceramic Capacitors.

w w w . a n a l o g i c t e c h . c o m

1239-1.2007.10.1.0

1...15 16 171819 20 21

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