Datasheet > AAT1236IRN-T1

AAT1236IRN-T1

更新时间： 2024-02-02 13:34:03

品牌	Logo	应用领域
AAT		驱动器接口集成电路
页数	文件大小	规格书
24页	1012K
描述
High Efficiency White LED Drivers for Backlight and Keypad

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技术参数
数据手册

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AAT1236IRN-T1 技术参数

生命周期：	Transferred	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.68
Base Number Matches：	1

AAT1236IRN-T1 数据手册

AAT1236

High Efficiency White LED Drivers

for Backlight and Keypad

2. Minimize the distance between L1 to D1 and

switching pin SW; minimize the size of the PCB

area connected to the SW pin.

3. Maintain a ground plane and connect to the IC

GND pin(s) as well as the GND connections of

C1 and C2.

4. Consider additional PCB metal area on D1’s

cathode to maximize heatsinking capability.

This may be necessary when using a diode

with a high V_Fand/or thermal resistance.

5. Do not connect the exposed paddle (bottom of

the die) to either AGND or GND because it is

connected internally to SW. Connect the

exposed paddle to the SW pin or leave floating.

PCB Layout Guidelines

Boost converter performance can be adversely

affected by poor layout. Possible impact includes

high input and output voltage ripple, poor EMI per-

formance, and reduced operating efficiency. Every

attempt should be made to optimize the layout in

order to minimize parasitic PCB effects (stray

resistance, capacitance, and inductance) and EMI

coupling from the high frequency SW node. A sug-

gested PCB layout for the AAT1236 boost convert-

er is shown in Figures 10 and 11. The following

PCB layout guidelines should be considered:

1. Minimize the distance from Capacitor C1 and

C2’s negative terminals to the GND pins. This

is especially true with output capacitor C2,

which conducts high ripple current from the

output diode back to the GND pins.

Figure 10: AAT1236 Evaluation Board

Top Side Layout.

Figure 11: AAT1236 Evaluation Board

Bottom Side Layout.

1236.2007.02.1.1

1...18 19 202122 23 24

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