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A8600 PDF预览

A8600

更新时间: 2024-01-12 09:56:08
品牌 Logo 应用领域
急速微 - ALLEGRO 汽车音响
页数 文件大小 规格书
52页 2065K
描述
Designed to provide the power supply requirements of next generation car audio and infotainment systems, the A8600 provides all the control and protection circuitry to produce...

A8600 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.84特性阻抗:50 Ω
最大输入功率 (CW):48.75 dBm最大工作频率:2000 MHz
最小工作频率:最高工作温度:125 °C
最低工作温度:-55 °C射频/微波设备类型:FIXED ATTENUATOR
最大电压驻波比:1.25Base Number Matches:1

A8600 数据手册

 浏览型号A8600的Datasheet PDF文件第4页浏览型号A8600的Datasheet PDF文件第5页浏览型号A8600的Datasheet PDF文件第6页浏览型号A8600的Datasheet PDF文件第8页浏览型号A8600的Datasheet PDF文件第9页浏览型号A8600的Datasheet PDF文件第10页 
Quadruple Output Regulator with Two High-Side Switches,  
BU/ACC Voltage Detectors, and Mute Delay  
A8600  
A8600  
VIN1/2/3  
VIN2/3  
ILIM  
CLK0° (SW1/3)  
CLK 180° (SW2)  
LOW IP PWM  
(SW1only)  
OSCILLATOR  
ON  
400mV  
IF FBx<0.4V then F /2  
IF HICCUPx=1 then F /4  
ELSE F  
TO FF,MIN  
BOOTx  
ISENSEx  
SLOPE  
COMP  
GCSA  
UPPER FET ON:  
1 & TO FF,M IN = 0  
Q
=
TGx  
BGx  
RESET  
DOMINANT  
UPPER FET OFF:  
FBx OV or  
1x OCx = 1 or  
PWM  
COMPARATOR  
LX2, 3  
IFBx  
ERROR  
AMP  
S
R
Q
Q
1x BOOTx UV or  
SSINITx =1 or  
LX1,2,3  
PWMxRST  
FBx  
Q
HICCUPx=  
1
800mVREF  
LOWER FET ON :  
BOOTx UV & TO FF,MIN = 1  
LOWER FET OFF :  
S S INITx = 1 or  
HICCUPx=  
1
CLAMP  
COMPxMAX  
400mV  
COMPx  
SSx  
ISSSUx  
ISSHICx  
LX1  
LX1  
FAULT  
SW1 only  
BOOT  
MONITOR&  
COUNTERS  
BOOTx – LXx  
1K  
5K  
BOOTx  
LXx  
7x BOOTx OV or  
30x BOOTx UV  
HICCUPx  
S
R
Q
Q
ISENSEx  
OCx  
COMPARATOR  
& COUNTER  
COMPxMAX  
SSx > 2.3V  
2.3V  
ENABLE  
COUNTER  
0.3V  
FBx > 0.3V  
0 = 30 counts  
1 = 118 counts  
TSDH (SW2, SW3 only)  
VREG POR  
SSINITx  
TG1  
EN (SW2, SW3 only)  
S
R
Q
Q
EN/PFM (S W1 only)  
UVLOx  
UVLOON  
UVLOOFF  
SW1 only  
FB1  
ISENSE1  
WAKE/SLEEP  
SW2 and SW3 only  
RESET  
DOMINANT  
IPEAK  
SW1  
LX2,3 or  
LG2  
BOOT1 ON  
LX2,LX3  
1x LX1FAULT  
FIXED  
S
R
Q
Q
OFF-TIME  
PFM  
CONTROL  
1x BOOT 1 FAULT  
FAULTS  
LOW IP PWM:  
All PWM functions  
ON & 50% I  
UVLO1  
ENABLE  
SSx < 0.2V  
FBx OV  
LIM  
EN/PFM  
0.2V  
SW2 and SW3 only  
860mV  
DE-  
GLITCH  
POKx  
FBx UV  
740mV  
SW2 & SW3 only  
Figure 2. Detailed functional block diagram for SW1, SW2, and SW3  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
7
Worcester, Massachusetts 01615-0036 U.S.A.  
1.508.853.5000; www.allegromicro.com  

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