Wide Input Voltage, 2 A Buck
Regulator Family with Low IQ Mode
A8585
ELECTRICAL CHARACTERISTICS1 Valid at 4.0 V ≤ VIN ≤ 35 V, −40°C ≤ TA = TJ ≤ 150ºC; unless otherwise specified
Characteristic
Input Voltage
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Input Voltage Range2
VIN
4.0
3.6
−
35
V
V
VIN Undervoltage Lockout Start
Threshold
VUVLO(ON) VIN rising
3.8
4.0
VIN Undervoltage Lockout Stop
Threshold
VUVLO(OFF) VIN falling
VUVLO(HYS)
3.2
3.4
3.6
V
VIN Undervoltage Hysteresis
Input Supply Current
−
400
−
mV
Input Supply Current (Not in PFM)
IIN
IOUT = 0 mA
−
−
2.5
10
3.5
14
mA
µA
VIN = 12 V, VOUT = 5.0 V, VPWM/PFM
≤ 1.2 V, IOUT = No Load, TA = 25ºC
ILO_IQ
A8585
(0A,5.0V)
VIN = 12 V, VOUT = 5.0 V, VPWM/PFM
−
−
−
−
−
−
−
−
−
15
28
33
7
−
33
−
µA
µA
µA
µA
µA
µA
µA
µA
µA
≤ 1.2 V, IOUT = No Load, TA = 65ºC
VIN = 12 V, VOUT = 5.0 V, VPWM/PFM
≤ 1.2 V, IOUT = 40 µA, TA = 25ºC
ILO_IQ
A8585
(40µA,5.0V)
VIN = 12 V, VOUT = 5.0 V, VPWM/PFM
≤ 1.2 V, IOUT = 40 µA, TA = 65ºC
Input Supply Current (Low IQ PFM) 3,4
VIN = 12 V, VOUT = 3.3 V, VPWM/PFM
10
−
≤ 1.2 V, IOUT = No Load, TA = 25ºC
ILO_IQ
A8585-1
A8585-1
(0A,3.3V)
VIN = 12 V, VOUT = 3.3 V, VPWM/PFM
≤ 1.2 V, IOUT = No Load, TA = 65ºC
12
20
25
5
VIN = 12 V, VOUT = 3.3 V, VPWM/PFM
≤ 1.2 V, IOUT = 40 µA, TA = 25ºC
24
−
ILO_IQ
(40µA,3.3V)
VIN = 12 V, VOUT = 3.3 V, VPWM/PFM
≤ 1.2 V, IOUT = 40 µA, TA = 65ºC
VEN/SLEEP = 0 V, TJ ≤ 85°C,
15
25
VIN = 16 V
A8585-2
A8585-3
Input Supply Current (Sleep Mode)
IIN(SLEEP)
VEN/SLEEP = 0 V, TJ ≤ 85°C,
7
VIN = 35 V
Voltage Regulation
0ºC < TJ < 85ºC, VOUT = 4 × VCOMP
4.950
4.925
3.267
3.250
5.0
5.0
3.3
3.3
5.050
5.075
3.333
3.350
V
V
V
V
EVOUT
A8585
A8585-2
–40ºC < TJ < 150ºC,
VOUT = 4 × VCOMP
(5.0V)
Output Voltage Accuracy5
Output Dropout Voltage4
0ºC < TJ < 85ºC, VOUT = 2 × VCOMP
EVOUT
A8585-1
A8585-3
–40ºC < TJ < 150ºC,
VOUT = 2 × VCOMP
(3.3V)
VIN = 5.8 V, IOUT = 1 A, fOSC = 300 kHz
VIN = 6.3 V, IOUT = 2 A, fOSC = 300 kHz
4.9
4.9
−
−
−
−
−
V
V
VO(PWM)
Low IQ Mode Ripple3,4
VPP(LO_IQ) 8 V < VIN < 12 V
IPEAK(LO_IQ)
25
800
65
930
mVPP
mAPEAK
Low IQ Peak Current Threshold
640
1Negative current is defined as coming out of the node or pin, positive current is defined as going into the node or pin.
2Thermally limited depending on input voltage, output voltage, duty cycle, regulator load currents, PCB layout, and airflow.
3Configured as shown in Typical Application diagram.
4Ensured by design and characterization, not production tested.
5At 0ºC < TJ < 85ºC, ensured by design and characterization, not production tested.
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
6
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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