Wide Input Voltage Range, High-Efficiency,
Fault-Tolerant LED Driver
A8518 and A8518-1
ELECTRICAL CHARACTERISTICS [1] (continued): Unless otherwise noted, specifications are valid at VIN = 16 V, TA = 25°C, • indi-
cates specifications guaranteed over the full operating temperature range with TA = TJ = –40°C to 125°C, typical specifications are at TA = 25°C
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
OSCILLATOR FREQUENCY
fSW measurements were taken with dithering
function disabled
Oscillator Frequency
fSW
●
1.95
2.15
2.35
MHz
LED CURRENT SINKS
LEDx Accuracy [4]
ErrLED
ΔLEDx
VLED
AISET
VISET
IISET
RISET = 8.33 kΩ
●
●
●
●
–
–
0.7
0.8
3
%
%
LEDx Matching
ISET = 120 µA
2
LEDx Regulation Voltage
ISET to ILEDx Current Gain
ISET Pin Voltage
VLED1 = VLED2, ISET = 120 µA
ISET = 120 µA
750
1391
0.987
20
850
1419
1.017
–
975
1453
1.047
144
mV
A/A
V
Allowable ISET Current
●
●
µA
While LED sinks are in regulation; sensed from
VLEDx to AGND
VLEDx Short Detect
VLEDx(SC)
tSS
4.7
–
5.2
20
5.7
–
V
Maximum time duration before all LED channels
come into regulation, or OVP is tripped
LED Startup Ramp Time [2]
ms
Measured while PWM = low, during dimming
control and internal references are powered on
(exceeding tPWML results in shutdown)
Maximum PWM Dimming Until Off-
Time [2]
tPWML
–
16
–
ms
First cycle when powering up IC (PWM = 0 to
3.3 V)
●
●
–
–
0.75
0.5
2
1
µs
µs
Minimum PWM On-Time
tPWMH(min1)
Subsequent PWM pulses
Time between PWM going high and when LED
current reaches 90% of maximum
(VPWM = 0 to 3.3 V)
PWM High to LED On Delay
PWM Low to LED Off Delay
tdPWM(on)
●
●
–
–
0.2
0.5
0.5
µs
µs
Time between PWM going low and when LED
current reaches 10% of maximum
(VPWM = 3.3 to 0 V)
tdPWM(off)
0.36
GATE PIN
Gate Pin Sink Current
Gate Pin Source Current
IGSINK
VGS = VIN, no input OCP fault
–
–
–113
6
–
–
μA
IGSOURCE VGS = VIN – 6 V, input OCP fault tripped
mA
Gate Shutdown Delay When
Overcurrent Fault Is Tripped [2]
tFAULT
VIN – VSENSE = 200 mV. Monitored at FAULT pin
–
–
–
3
–
µs
V
Measured between GATE and VIN when gate
is on
Gate Voltage
VGS
–6.7
VSENSE PIN
VSENSE Pin Sink Current
VSENSE Trip Point
Iadj
●
●
17.2
95
21.5
110
25.8
125
µA
VSENSE(trip) Measured between VIN and VSENSE, RADJ = 0
mV
Continued on the next page…
1 For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing); positive current is defined as going into the node or pin
(sinking).
2 Ensured by design and characterization, not production tested.
3 Minimum VIN = 4.5 V is only required at startup. After startup is completed, IC can continue to operate down to VIN = 3.9 V.
4 LED current is trimmed to cancel variations in both Gain and ISET voltage.
Allegro MicroSystems, LLC
115 Northeast Cutoff
7
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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