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A4988SETTR-T

更新时间： 2024-02-21 14:34:35

品牌	Logo	应用领域
急速微 - ALLEGRO		驱动器转换器运动控制电子器件信号电路电动机控制 PC
页数	文件大小	规格书
19页	369K
描述
DMOS Microstepping Driver with Translator and Overcurrent Protection

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A4988SETTR-T 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN, LCC28,.2SQ,20	针数：	28
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	1.63
Samacsys Confidence：	3	Samacsys Status：	Released
2D Presentation：	https://componentsearchengine.com/2D/0T/357268.3.1.png	Schematic Symbol：	https://componentsearchengine.com/symbol.php?partID=357268
PCB Footprint：	https://componentsearchengine.com/footprint.php?partID=357268	3D View：	https://componentsearchengine.com/viewer/3D.php?partID=357268
Samacsys PartID：	357268	Samacsys Image：	https://componentsearchengine.com/Images/9/A4988SETTR-T.jpg
Samacsys Thumbnail Image：	https://componentsearchengine.com/Thumbnails/3/A4988SETTR-T.jpg	Samacsys Pin Count：	29
Samacsys Part Category：	Integrated Circuit	Samacsys Package Category：	Quad Flat No-Lead
Samacsys Footprint Name：	ET Package, 28-Pin QFN with Exposed Thermal Pad	Samacsys Released Date：	2017-01-10 14:38:01
Is Samacsys：	N	模拟集成电路 - 其他类型：	STEPPER MOTOR CONTROLLER
JESD-30 代码：	S-XQCC-N28	JESD-609代码：	e3
长度：	5 mm	湿度敏感等级：	2
功能数量：	1	端子数量：	28
最高工作温度：	85 °C	最低工作温度：	-20 °C
最大输出电流：	2 A	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装等效代码：	LCC28,.2SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	35 V
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	Motion Control Electronics	最大供电电流 (Isup)：	8 mA
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	3 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	DMOS	温度等级：	OTHER
端子面层：	Matte Tin (Sn)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	40	宽度：	5 mm
Base Number Matches：	1

A4988SETTR-T 数据手册

DMOS Microstepping Driver with Translator

and Overcurrent Protection

A4988

Functional Description

Device Operation. The A4988 is a complete microstepping

motor driver with a built-in translator for easy operation with

minimal control lines. It is designed to operate bipolar stepper

motors in full-, half-, quarter-, eighth, and sixteenth-step modes.

The currents in each of the two output full-bridges and all of the

N-channel DMOS FETs are regulated with fixed off-time PWM

(pulse width modulated) control circuitry. At each step, the current

for each full-bridge is set by the value of its external current-sense

resistor (R_S1and R_S2), a reference voltage (V_REF), and the output

voltage of its DAC (which in turn is controlled by the output of

the translator).

Mixed Decay Operation. The bridge operates in Mixed

decay mode, at power-on and reset, and during normal running

according to the ROSC configuration and the step sequence, as

shown in figures 8 through 12. During Mixed decay, when the trip

point is reached, the A4988 initially goes into a fast decay mode

for 31.25% of the off-time, t_OFF. After that, it switches to Slow

decay mode for the remainder of t_OFF. A timing diagram for this

feature appears on the next page.

Typically, mixed decay is only necessary when the current in the

winding is going from a higher value to a lower value as determined

by the state of the translator. For most loads automatically-selected

mixed decay is convenient because it minimizes ripple when the

current is rising and prevents missed steps when the current is falling.

For some applications where microstepping at very low speeds is

necessary, the lack of back EMF in the winding causes the current to

increase in the load quickly, resulting in missed steps. This is shown

in figure 2. By pulling the ROSC pin to ground, mixed decay is set to

be active 100% of the time, for both rising and falling currents, and

prevents missed steps as shown in figure 3. If this is not an issue, it

is recommended that automatically-selected mixed decay be used,

because it will produce reduced ripple currents. Refer to the Fixed

Off-Time section for details.

At power-on or reset, the translator sets the DACs and the phase

current polarity to the initial Home state (shown in figures 8

through 12), and the current regulator to Mixed Decay Mode for

both phases. When a step command signal occurs on the STEP

input, the translator automatically sequences the DACs to the

next level and current polarity. (See table 2 for the current-level

sequence.) The microstep resolution is set by the combined effect

of the MSx inputs, as shown in table 1.

When stepping, if the new output levels of the DACs are lower

than their previous output levels, then the decay mode for the

active full-bridge is set to Mixed. If the new output levels of the

DACs are higher than or equal to their previous levels, then the

decay mode for the active full-bridge is set to Slow. This auto-

matic current decay selection improves microstepping perfor-

mance by reducing the distortion of the current waveform that

results from the back EMF of the motor.

Low Current Microstepping. Intended for applications

where the minimum on-time prevents the output current from

regulating to the programmed current level at low current steps.

To prevent this, the device can be set to operate in Mixed decay

mode on both rising and falling portions of the current waveform.

This feature is implemented by shorting the ROSC pin to ground.

In this state, the off-time is internally set to 30 μs.

Microstep Select (MSx). The microstep resolution is set by

the voltage on logic inputs MSx, as shown in table 1. The MS1 and

MS3 pins have a 100 kΩ pull-down resistance, and the MS2 pin

has a 50 kΩ pull-down resistance. When changing the step mode

the change does not take effect until the next STEP rising edge.

¯¯¯¯¯¯¯¯¯¯

¯¯¯¯¯¯¯¯¯

Reset Input (RESET). The RESET input sets the translator

to a predefined Home state (shown in figures 8 through 12), and

turns off all of the FET outputs. All STEP inputs are ignored until

If the step mode is changed without a translator reset, and abso-

lute position must be maintained, it is important to change the

step mode at a step position that is common to both step modes in

order to avoid missing steps. When the device is powered down,

¯¯¯¯¯¯¯¯¯

the RESET input is set to high.

Step Input (STEP). A low-to-high transition on the STEP

or reset due to TSD or an over current event the translator is set to input sequences the translator and advances the motor one incre-

the home position which is by default common to all step modes. ment. The translator controls the input to the DACs and the direc-

Allegro MicroSystems, Inc.

115 Northeast Cutoff

4988-DS

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

1...4 5 678 9 10...19

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