A4900
High Voltage Three Phase Gate Driver
VCC undervoltage
VDS overvoltage
VCC is the supply for the low-side gate driver and the boot-
Each of the six external power switching devices is provided with
strap charge current. It is critical to ensure that the voltages are
sufficiently high before enabling any of the outputs. The under-
an independent overvoltage monitor, used to switch the device off
if an overvoltage is detected. For each high-side power switching
voltage monitor circuit is active during power up. Both fault flags device, the monitor compares a fixed threshold voltage, VDSTH
,
are high and the motor is coasting (all gate drives low) until VCC
is greater than approximately 11 V.
to the differential voltage between the DHx terminal and the Sx
terminal. For each low-side power switching device, the monitor
compares VDSTH to the voltage between the DLx terminal and
the GND terminal. The output of the monitor comparator is high
when the monitored voltage is greater than VDSTH , but is only
valid when the associated switching device is turned on.
When a VCC undervoltage is detected, the fault flags and the
fault register will be set and all gate drive outputs will be pulled
low. When the VCC undervoltage condition is removed, the flags
will be cleared and the outputs enabled. The VC bit in the Fault
register will remain set until cleared by a register reset (see Fault
Register Serial Access section, below).
Power MOSFETs and IGBTs take a finite time to reach their full
conduction state, so the monitored voltage may remain above
the threshold and show a fault as the power switching device is
turned on. To overcome this and avoid false short fault detection,
the output of a comparator is ignored until one VDS fault blank
time, tBL, after the associated external switching device is turned
on. If the monitored voltage remains above VDSTH after the VDS
fault blank time, then a short fault will be detected.
Bootstrap undervoltage
The A4900 has three independent bootstrap voltage monitors, one
for each phase. These monitor the individual bootstrap capacitor
charge voltages to ensure sufficient high-side drive voltage. Each
phase operates independently, such that a bootstrap undervoltage
on one phase does not affect the other two phases.
The monitored voltage is derived from the actual voltage across
the power switching device using a resistor divider. This is
necessary to prevent damage to the monitor input, either DHx or
DLx, by the large differential voltage across the power switch-
ing device when the it is off. The monitor input is clamped to the
respective reference point with a 5 V clamp. For the high-side the
clamps are between the DHx and Sx terminals. For the low-side
the clamps are between the DLx and GND terminals. The values
of the resistors in the monitor voltage divider must be selected to
ensure that the current through the clamp is limited to less than
the maximum value, IDCL. For example, a motor supply of 400 V
means that the maximum voltage across the upper resistor in the
Before a high-side drive can be turned on, the voltage of the cor-
responding bootstrap capacitor must be higher than the turn-on
voltage limit, VBCUVon. If the bootstrap capacitor voltage is not
above VBCUVon , the A4900 does not allow the high-side gate
drive output to go high.
The bootstrap voltage monitor for a phase remains active while
a high-side gate drive output for that phase is commanded to be
in the on state. If a high-side gate drive is high and the voltage of
the corresponding bootstrap capacitor drops below the turn-off
voltage, VBCUVoff , then that high-side gate drive will be turned
off. The output will remain off until an off-to-on transition is
commanded by the control logic and the bootstrap capacitor volt- divider will be 395 V. The current through the resistor must be
age is above the turn-on voltage, VBCUVon
.
less than 1 mA, so the resistor must be greater than 395 kΩ. If the
required detection voltage across the power switching device is
say 3 V, then the lower resistor in the divider must be 790 kΩ to
achieve a monitor voltage of 2 V.
The bootstrap undervoltage fault state has no effect on the fault
flag outputs or the Fault register.
VDD undervoltage
A short fault on either the high-side or the low-side always turns
off the external switching device where the fault is detected,
and holds it off until the control input is switched low then high
again. This ensures that the overcurrent stress on the switching
device is limited to a few microseconds after it is switched on.
The internal logic supply voltage, VDD , is monitored to ensure
correct logical operation. If an undervoltage of VDD is detected,
then the state of other reported faults might not be valid, so
all fault states, fault flags, and the Fault register are reset and
replaced by the VDD undervoltage condition, and the outputs are
disabled. When the VDD undervoltage condition is removed all
flags will be cleared and the outputs will be enabled.
Only the low-side VDS overvoltage fault is indicated by the fault
flags and captured in the Fault register. When a low-side fault is
Allegro MicroSystems, LLC
115 Northeast Cutoff
13
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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