A4915
3-Phase MOSFET Driver
Description
Features and Benefits
• 5 to 50 V supply voltage
• Latched TSD with fault output
• Drives six N-channel high current MOSFETs
• Internally controlled synchronous rectification
• Speed voltage input enables internal PWM duty cycle
control of full bridge
• Center aligned PWM
• Internal UVLO and crossover current protection
• Hall switch inputs
The A4915 is designed for pulse width modulated (PWM)
current control of 3-phase brushless DC motors. The A4915
is capable of high current gate drive for 6 all N-channel power
MOSFETs. An internal charge pump ensures gate drive down
to 7 V supply and provides limited gate drive down to 5 V. A
bootstrap capacitor is used to generate a supply voltage greater
than the source voltage of the high side MOSFET, required
for N-channel MOSFETs.
Internalsynchronousrectificationcontrolcircuitryisprovided
to improve power dissipation in the external MOSFETs during
PWM operation. Internal circuit protection includes latched
thermal shutdown, dead time protection, and undervoltage
lockout. Special power up sequencing is not required.
• Adjustable dead time protection
• Low power sleep mode for battery-powered applications
Packages:
The A4915 is supplied in a 28-pin TSSOP with an exposed
thermal pad (suffix LP) and a 28-contact 5 × 5 mm QFN with
an exposed thermal pad (suffix ET). These packages are lead
(Pd) free, with 100% matte-tin leadframe plating.
28-pin TSSOP
28-contact QFN
with exposed thermal pad
5 mm × 5 mm × 0.90 mm
(LP package)
(ET package)
Not to scale
Functional Block Diagram
0.47 μF
VDD
A4915
VBB
V
IN
Comm
Logic
Charge Pump
Regulator
HA
HB
HC
47 V
TVS
CREG
CVBB1
CVBB2
VREG
VDD
VDD
Phase A
Bootstrap
Monitor
R2
CVDD1
R1
R3
CA
CB
HA
HB
HC
CBOOTA
TDEAD
BRAKEn
DIR
High Side
Driver
CC
GHA
GHB
GHC
SA
RGATE
R
dead
Control
Logic
ENABLE
SB
VREG
SC
To Phase B
To Phase C
GLA
GLB
GLC
OSC
RGATE
Low Side
Driver
VDD
Voltage to
Duty
One of three phases shown
SPEED
FAULT
LSS
VRESET
GND
A4915-DS, Rev. 1