Datasheet > A43E0616V-75I

A43E0616V-75I

更新时间： 2022-04-25 03:48:45

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
42页	502K
描述
1M X 16 Bit X 4 Banks Synchronous DRAM

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数据手册

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A43E0616V-75I 数据手册

A43L2616B

AC Operating Test Conditions

(VDD = 3.3V ±0.3V, TA = 0°C to +70°C or TA = -40ºC to +85ºC)

Parameter

Value

AC input levels

VIH/VIL = 2.4V/0.4V

1.4V

Input timing measurement reference level

Input rise and all time (See note3)

Output timing measurement reference level

Output load condition

tr/tf = 1ns/1ns

1.4V

See Fig.2

3.3V

V^OH(DC) = 2.4V, IOH = -2mA

V^OL(DC) = 0.4V, IOL = 2mA

V^TT=1.4V

1200Ω

50Ω

Output

ZO=50Ω

OUTPUT

50pF

870Ω

50pF

(Fig. 2) AC Output Load Circuit

(Fig. 1) DC Output Load Circuit

AC Characteristics

(AC operating conditions unless otherwise noted)

-6

-7

Unit

Note

Symbol

tCC

Parameter

CAS Latency

Min

Max

Min

Max

CLK cycle time

1000

tSAC

CLK to valid Output delay

1,2

2.5

tOH

tCH

Output data hold time

CLK high pulse width

2.5

tCL

tSS

CLK low pulse width

Input setup time

2.5

1.5

tSH

tSLZ

Input hold time

CLK to output in Low-Z

tSHZ

CLK to output In Hi-Z

*All AC parameters are measured from half to half.

Note : 1. Parameters depend on programmed CAS latency.

2. If clock rising time is longer than 1ns, (tr/2-0.5) ns should be added to the parameter.

3. Assumed input rise and fall time (tr & tf) = 1ns.

If tr & tf is longer than 1ns, transient time compensation should be considered,

i.e., [(tr + tf)/2-1]ns should be added to the parameter.

(December, 2009, Version 1.3)

AMIC Technology, Corp.

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