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A3995SEVTR-T PDF预览

A3995SEVTR-T

更新时间: 2024-02-01 04:17:42
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器运动控制电子器件信号电路电动机控制电机
页数 文件大小 规格书
9页 943K
描述
DMOS Dual Full Bridge PWM Motor Driver

A3995SEVTR-T 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:QFN-36针数:36
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:8.56
Is Samacsys:N其他特性:ALSO REQUIRES 8V TO 36V VBB SUPPLY
模拟集成电路 - 其他类型:STEPPER MOTOR CONTROLLERJESD-30 代码:S-XQCC-N36
JESD-609代码:e3长度:6 mm
湿度敏感等级:2功能数量:2
端子数量:36最高工作温度:85 °C
最低工作温度:-20 °C最大输出电流:3.5 A
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC36,.25SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3/5,36 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Motion Control Electronics
最大供电电流 (Isup):10 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V表面贴装:YES
技术:NMOS温度等级:OTHER
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6 mm
Base Number Matches:1

A3995SEVTR-T 数据手册

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A3995  
DMOS Dual Full Bridge PWM Motor Driver  
Functional Description  
Device Operation The A3995 is designed to operate two  
dc motors. The currents in each of the output full-bridges, all  
N-channel DMOS, are regulated with fixed off-time pulse width  
modulated (PWM) control circuitry. The peak current to each full  
bridge is set by the value of an external current sense resistor,  
Control Logic Dc motor commutation is accomplished by  
applying a PWM signal together with the PHASE or ENABLE  
inputs. Fast or slow current decay during the off-time is selected  
via the MODE pin. Synchronous Rectification is always active  
regardless of the state of the MODE pin.  
RSx , and a reference voltage, VREFx  
.
Charge Pump (CP1 and CP2) The charge pump is used to  
generate a gate supply greater than the VBB in order to drive the  
source-side DMOS gates. A 0.1 μF ceramic capacitor should be  
connected between CP1 and CP2 for pumping purposes. A 0.1 μF  
ceramic capacitor is required between VCP and VBBx to act as a  
reservoir to operate the high-side DMOS devices.  
If the logic inputs are pulled up to VDD, it is good practice to use  
a high value pullup resistor in order to limit current to the logic  
inputs should an overvoltage event occur. Logic inputs include:  
PHASEx, ENABLEx, and MODE.  
Internal PWM Current Control Each full-bridge is con-  
trolled by a fixed off-time PWM current control circuit that limits  
the load current to a desired value, ITRIP. Initially, a diagonal pair  
of source and sink DMOS outputs are enabled and current flows  
through the motor winding and RSx. When the voltage across the  
current sense resistor equals the voltage on the VREFx pin, the  
current sense comparator resets the PWM latch, which turns off  
the source driver.  
Shutdown In the event of a fault (excessive junction tem-  
perature, or low voltage on VCP), the outputs of the device are  
disabled until the fault condition is removed. At power-up, the  
undervoltage lockout (UVLO) circuit disables the drivers.  
Synchronous Rectification When a PWM-off cycle is  
triggered by an internal fixed off-time cycle, load current will  
recirculate. The A3995 synchronous rectification feature will  
turn on the appropriate MOSFETs during the current decay. This  
effectively shorts the body diode with the low RDS(on) driver. This  
significantly lowers power dissipation. When a zero current level  
is detected, synchronous rectification is turned off to prevent  
reversal of the load current.  
The maximum value of current limiting is set by the selection of  
RS and the voltage at the VREF input with a transconductance  
function approximated by:  
ITripMax = VREF / (3×RS)  
Note: It is critical to ensure that the maximum rating of ±500 mV  
on each SENSEx pin is not exceeded.  
MODE Control input MODE is used to toggle between fast  
decay mode and slow decay mode. A logic high puts the device  
in slow decay mode. Synchronous rectification is always enabled  
when ENABLE is low.  
Fixed Off-Time The internal PWM current control circuitry  
uses a one shot circuit to control the time the drivers remain off.  
The one shot off-time, toff, is internally set to 30 µs.  
Blanking This function blanks the output of the current sense  
comparator when the outputs are switched by the internal current  
control circuitry. The comparator output is blanked to prevent  
false detections of overcurrent conditions, due to reverse recovery  
currents of the clamp diodes, or to switching transients related  
to the capacitance of the load. The driver blank time, tBLANK , is  
approximately 3 μs.  
Braking The Braking function is implemented by driving the  
device in slow decay mode via the MODE pin and applying an  
ENABLE chop command. Because it is possible to drive current  
in both directions through the DMOS switches, this configura-  
tion effectively shorts the motor-generated BEMF as long as the  
ENABLE chop mode is asserted. The maximum current can be  
approximated by VBEMF/RL. Care should be taken to ensure that  
the maximum ratings of the device are not exceeded in worst case  
braking situations: high speed and high inertia loads.  
Phase Input (PHASEx) The state of the PHASEx input  
determines the direction of rotation of the motor.  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff, Box 15036  
6
Worcester, Massachusetts 01615-0036 (508) 853-5000  
www.allegromicro.com  

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