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A3938SLD PDF预览

A3938SLD

更新时间: 2024-01-03 02:42:13
品牌 Logo 应用领域
急速微 - ALLEGRO 运动控制电子器件信号电路光电二极管电动机控制控制器
页数 文件大小 规格书
11页 399K
描述
Three-Phase Power MOSFET Controller

A3938SLD 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SSOP, SOP36,.4,32
针数:36Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.73模拟集成电路 - 其他类型:BRUSHLESS DC MOTOR CONTROLLER
JESD-30 代码:R-PDSO-G36长度:15.3 mm
功能数量:1端子数量:36
最高工作温度:85 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SOP36,.4,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH电源:18/50 V
认证状态:Not Qualified座面最大高度:2.64 mm
子类别:Motion Control Electronics最大供电电流 (Isup):8 mA
最大供电电压 (Vsup):50 V最小供电电压 (Vsup):18 V
表面贴装:YES温度等级:OTHER
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

A3938SLD 数据手册

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A3938  
Three-Phase Power MOSFET Controller  
VBB. Motor power supply connection for the A3938 and  
for power MOSFETs. It is good practice to connect a decou-  
DEAD. Analog input. A resistor between DEAD and LCAP  
is selected to adjust turn-off time to turn-on time. This  
pling capacitor from this pin to AGND, as close to the device delay is needed to prevent cross-conduction in the external  
pins as possible.  
power MOSFETs. See the section Application Information  
for details on setting dead time.  
REF. Analog input to current limit comparator. Voltage  
applied here sets the peak load current according to the fol-  
lowing equation:  
SENSE. Analog input to the current limit comparator.  
Voltage representing load current appears on this pin. Voltage  
transients that are seen at this pin when the drivers turn on  
ITRIP = VREF / RSENSE  
are ignored for period of time, tBLANK  
.
AGND. Analog reference ground.  
LCAP. 5 V reference to power internal logic and provide  
low current for DEAD pin and FAULT pin. Connection for  
0.1 µF external capacitor for decoupling.  
PGND. Return for low-side gate drivers. This should be  
connected to the PCB power ground.  
Commutation Truth Table  
H1  
1
1
1
0
0
0
1
1
1
0
0
0
H2  
0
0
1
1
1
0
0
0
1
1
1
0
H3  
1
0
0
0
1
1
1
0
0
0
1
1
DIR  
1
1
1
1
1
1
0
0
0
0
0
0
GLA  
0
0
1
1
0
0
1
0
0
0
0
1
GLB  
0
0
0
0
1
1
0
1
1
0
0
0
GLC  
1
1
0
0
0
0
0
0
0
1
1
0
GHA  
1
0
0
0
0
1
0
0
1
1
0
0
GHB  
0
1
1
0
0
0
0
0
0
0
1
1
GHC  
0
0
0
1
1
0
1
1
0
0
0
0
SA  
HI  
Z
LO  
LO  
Z
HI  
LO  
Z
HI  
HI  
Z
SB  
Z
HI  
HI  
Z
LO  
LO  
Z
LO  
LO  
Z
SC  
LO  
LO  
Z
HI  
HI  
Z
HI  
HI  
Z
LO  
LO  
Z
HI  
HI  
LO  
Input Logic  
MODE  
PWM  
RESET  
Quadrant  
Mode of Operation**  
PWM chop – current decay with opposite of selected low-  
side drivers ON.  
Selected drivers ON. If current limiting, opposite of selected  
low-side drivers ON.  
0*  
0*  
0
1
0
Fast decay  
0
Fast Decay  
1
1
0
1
0
0
Slow decay PWM chop – current decay with both low-side drivers ON.  
Slow Decay Selected drivers ON. If current limiting, both low-side drivers ON.  
All high-side drivers OFF, low-sides see BRKSEL stored.  
Clears storable faults.  
X
X
1
X
* Low-side, only, Synchronous Rectication mode.  
**See Commutation Truth Table for meaning of “both” and "selected."  
6
www.allegromicro.com  
115 Northeast Cutoff, Box 15036  
Worcester, Massachusetts 01615-0036 (508) 853-5000  

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