A3933

更新时间： 2024-02-19 10:25:54

品牌	Logo	应用领域
急速微 - ALLEGRO		控制器
页数	文件大小	规格书
12页	169K
描述
THREE-PHASE POWER MOSFET CONTROLLER

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技术参数
数据手册

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A3933 技术参数

生命周期：	Obsolete	零件包装代码：	QFJ
包装说明：	QCCJ,	针数：	32
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.81
模拟集成电路 - 其他类型：	BRUSHLESS DC MOTOR CONTROLLER	JESD-30 代码：	R-PQCC-J32
长度：	13.97 mm	功能数量：	1
端子数量：	32	最高工作温度：	85 °C
最低工作温度：	-20 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装形状：	RECTANGULAR
封装形式：	CHIP CARRIER	认证状态：	Not Qualified
座面最大高度：	3.55 mm	最大供电电压 (Vsup)：	28 V
最小供电电压 (Vsup)：	12 V	标称供电电压 (Vsup)：	15 V
表面贴装：	YES	温度等级：	OTHER
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	QUAD	宽度：	11.43 mm
Base Number Matches：	1

A3933 数据手册

3933

THREE-PHASE POWER

MOSFET CONTROLLER

Terminal Descriptions

RESET — A logic input used to enable the device, internally

pulled up to V_LCAP(+5 V). A logic HIGH will disable the

device and force all gate drivers to 0 V, coasting the motor. A

logic LOW allows the gate drive to follow commutation logic.

This input overrides BRAKE.

Terminal

Name

PGND

RESET

GLC

GLA/GLB/GLC — Low-side, gate-drive outputs for external

NMOS drivers. External series-gate resistors (as close as

possible to the NMOS gate) can be used to control the slew rate

seen at the power-driver gate, thereby controlling the di/dt and

dv/dt of the SA/SB/SC outputs. Each output is designed and

specified to drive a 1000 pF load with a rise time of 50 ns.

GHC

GLB

GHB

SA/SB/SC — Directly connected to the motor, these terminals

sense the voltages switched across the load. These terminals

are also connected to the negative side of the bootstrap capaci-

tors and are the negative supply connections for the floating

high-side drive.

GLA

GHA

GHA/GHB/GHC — High-side, gate-drive outputs for external

NMOS drivers. External series-gate resistors (as close as

possible to the NMOS gate) can be used to control the slew rate

seen at the power-driver gate, thereby controlling the di/dt and

dv/dt of the SA/SB/SC outputs. Each output is designed and

specified to drive a 1000 pF load with a rise time of 100 ns.

V_CCOUT

LCAP

FAULT

MODE

V_BB

CA/CB/CC — High-side connections for the bootstrap capaci-

tors, positive supply for high-side gate drive. The bootstrap

capacitor is charged to approximately V_CCOUTwhen the

associated output SA/SB/SC terminal is low. When the output

swings high, the voltage on this terminal rises with the output to

provide the boosted gate voltage needed for n-channel power

FETs.

DIR

BRAKE

BRKCAP

BRKSEL

PWM

continued next page

SENSE

REF

DEAD

AGND

www.allegromicro.com

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