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A32200DXV-3PQ208I PDF预览

A32200DXV-3PQ208I

更新时间: 2024-01-28 07:00:58
品牌 Logo 应用领域
ACTEL
页数 文件大小 规格书
82页 457K
描述
Field Programmable Gate Array, 1230 CLBs, 20000 Gates, CMOS, PQFP208, PLASTIC, QFP-208

A32200DXV-3PQ208I 数据手册

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Integrator Series FPGAs  
– 1200XL and 3200DX Familes  
F e a t u r e s  
Cadence, Escalade, Exemplar, IST, Mentor Graphics,  
Synopsys and Viewlogic  
H ig h C a p a c it y  
• JTAG 1149.1 Boundary Scan Testing  
• 2,500 to 40,000 logic gates  
Up to 4 Kbits configurable dual-port SRAM  
• Fast wide-decode circuitry  
G e n e r a l D e s c r i p t i o n  
Actels Integrator Series FPGAs are the first programmable  
logic devices optimized for high-speed system logic  
integration. Based on Actel's proprietary PLICE antifuse  
technology and state-of-the-art 0.6-micron double metal  
CMOS process, the Integrator Series devices offer a  
fine-grained, register-rich architecture with the industry’s  
fastest embedded dual-port SRAM and wide decode circuitry.  
Up to 288 user-programmable I/O Pins  
H ig h P e r fo r m a n c e  
• 225 MHz performance  
• 5 ns Dual-Port SRAM Access  
• 100 MHz FIFOs  
• 7.5 ns 35-bit Address Decode  
3200DX and 1200XL FPGAs were designed to integrate  
system logic which is typically implemented in multiple  
CPLDs, PALs and FPGAs. These devices provide the features  
and performance required for today’s complex, high-speed  
digital logic systems. The 3200DX family offers the industrys  
fastest dual-port SRAM for implementing fast FIFOs, LIFOs  
and temporary data storage. The large number of storage  
elements can efficiently address applications requiring wide  
datapath manipulation and transformation functions such as  
telecommunications, networking and DSP.  
E a s e -o f-In t e g r a t io n  
• Synthesis-friendly architecture supports ASIC design  
methodologies  
• 95–100% device utilization using automatic Place and  
Route Tools  
Deterministic, user-controllable timing via DirectTime  
software tools  
• Supported by Actel Designer Series development system  
with interfaces to popular design environments such as  
I n t e g r a t o r S e r i e s P r o d u c t P r o f i l e  
Device  
A1225XL  
A1240XL A3265DX A1280XL A32100DX A32140DX A32200DX A32300DX A32400DX  
Capacity  
Logic Gates  
1
2,500  
N/A  
4,000  
N/A  
6,500  
N/A  
8,000  
N/A  
10,000  
2,048  
14,000  
N/A  
20,000  
2,560  
30,000  
3,072  
40,000  
4,096  
SRAM Bits  
Logic Modules  
Sequential  
Combinatorial  
Decode  
231  
220  
N/A  
348  
336  
N/A  
510  
475  
20  
624  
608  
N/A  
700  
662  
20  
954  
912  
24  
1,230  
1,184  
24  
1,888  
1,833  
28  
2,526  
2,466  
28  
SRAM Modules  
(64x4 or 32x8)  
NA  
231  
2
NA  
348  
2
NA  
510  
2
NA  
624  
2
8
NA  
954  
2
10  
1,230  
6
12  
1,888  
6
16  
2,526  
6
Dedicated Flip-Flops  
Clocks  
700  
6
User I/O (maximum)  
JTAG  
83  
104  
No  
126  
No  
140  
No  
152  
Yes  
176  
Yes  
202  
Yes  
250  
Yes  
288  
No  
Yes  
Packages  
PL84  
PL84  
PL84  
PL84  
PL84  
PQ160  
PQ208  
TQ176  
CQ84  
PL84  
PQ208  
RQ208  
RQ240  
CQ208  
CQ256  
RQ208  
RQ240  
CQ256  
RQ240  
PQ100  
VQ100  
PG100  
PQ100  
PQ144  
TQ176  
PG132  
PQ100  
PQ160  
TQ176  
PQ160  
PQ208  
TQ176  
PG176  
CQ172  
PQ160  
PQ208  
TQ176  
CQ256  
Note 1: Logic gate capacity does not include SRAM bits as logic.  
S e p t e m b e r 1 9 9 7  
1 -9  
© 1997 Actel Corporation  
 

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