A29L161A Series
General Description
The A29L161A is a 16Mbit, 3.3 volt-only Flash memory
organized as 2,097,152 bytes of 8 bits or 1,048,576 words of
16 bits each. The 8 bits of data appear on I/O0 - I/O7; the 16
bits of data appear on I/O0~I/O15. The A29L161A is offered in
48-ball FBGA packages. This device is designed to be
programmed in-system with the standard system 3.3 volt
VCC supply. Additional 12.0 volt VPP is not required for in-
system write or erase operations. However, the A29L161A
can also be programmed in standard EPROM programmers.
The A29L161A has the first toggle bit, I/O6, which indicates
whether an Embedded Program or Erase is in progress, or it
is in the Erase Suspend. Besides the I/O6 toggle bit, the
A29L161A has a second toggle bit, I/O2, to indicate whether
the addressed sector is being selected for erase. The
A29L161A also offers the ability to program in the Erase
Suspend mode. The standard A29L161A offers access times
of 60 and 70ns, allowing high-speed microprocessors to
operate without wait states. To eliminate bus contention the
Device programming occurs by writing the proper program
command sequence. This initiates the Embedded Program
algorithm - an internal algorithm that automatically times the
program pulse widths and verifies proper program margin.
Device erasure occurs by executing the proper erase
command sequence. This initiates the Embedded Erase
algorithm
-
an internal algorithm that automatically
preprograms the array (if it is not already programmed)
before executing the erase operation. During erase, the
device automatically times the erase pulse widths and
verifies proper erase margin. The Unlock Bypass mode
facilitates faster programming times by requiring only two
write cycles to program data instead of four.
The host system can detect whether a program or erase
operation is complete by reading the I/O7 (
Polling) and
Data
I/O6 (toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data or
accept another command.
The sector erase architecture allows memory sectors to be
erased and reprogrammed without affecting the data
contents of other sectors. The A29L161A is fully erased
when shipped from the factory.
The Erase Suspend/Erase Resume feature enables the user
to put erase on hold for any period of time to read data from,
or program data to, any other sector that is not selected for
erasure. True background erase can thus be achieved.
The device offers two power-saving features. When
addresses have been stable for a specified amount of time,
the device enters the automatic sleep mode. The system can
also place the device into the standby mode. Power
consumption is greatly reduced in both these modes.
device has separate chip enable (
), write enable (
)
WE
CE
and output enable (
) controls.
OE
The device requires only a single 3.3 volt power supply for
both read and write functions. Internally generated and
regulated voltages are provided for the program and erase
operations.
The A29L161A is entirely software command set compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register contents
serve as input to an internal state-machine that controls the
erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and
erase operations. Reading data out of the device is similar to
reading from other Flash or EPROM devices.
Pin Configurations
ꢀTFBGA
TFBGA
Top View, Balls Facing Down
G6
A6
B6
C6
D6
E6
F6
H6
A13
A12
A14
A15
A16
NC
I/O15(A-1)
VSS
G5
A5
B5
C5
D5
E5
F5
H5
A9
A8
A10
A11
I/O
7
I/O14
I/O13
I/O
6
A4
B4
C4
D4
E4
F4
G4
H4
NC
NC
I/O
5
I/O12
VCC
I/O
4
WE
A19
G3
A3
B3
C3
D3
E3
F3
H3
NC
NC
A18
NC
I/O
2
I/O10
I/O11
I/O
3
C2
A6
D2
A5
E2
F2
G2
H2
A2
B2
A7
A17
I/O
0
I/O
8
I/O
9
I/O
1
G1
A1
B1
C1
A2
D1
A1
E1
F1
H1
A3
A4
A0
OE
OE
VSS
PRELIMINARY (March, 2006, Version 0.0)
2
AMIC Technology, Corp.
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