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A29L160UV-70 PDF预览

A29L160UV-70

更新时间: 2024-02-03 20:28:26
品牌 Logo 应用领域
联笙电子 - AMICC 闪存
页数 文件大小 规格书
45页 429K
描述
2M X 8 Bit / 1M X 16 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory

A29L160UV-70 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:TSOP1, TSSOP48,.8,20Reach Compliance Code:unknown
风险等级:5.71最长访问时间:70 ns
备用内存宽度:8启动块:BOTTOM
命令用户界面:YES通用闪存接口:YES
数据轮询:YESJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:18.4 mm
内存密度:16777216 bit内存集成电路类型:FLASH
内存宽度:16功能数量:1
部门数/规模:1,2,1,31端子数量:48
字数:1048576 words字数代码:1000000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:1MX16
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP48,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:3/3.3 V编程电压:3 V
认证状态:Not Qualified就绪/忙碌:YES
座面最大高度:1.2 mm部门规模:16K,8K,32K,64K
最大待机电流:0.000005 A子类别:Flash Memories
最大压摆率:0.03 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:12 mm
Base Number Matches:1

A29L160UV-70 数据手册

 浏览型号A29L160UV-70的Datasheet PDF文件第36页浏览型号A29L160UV-70的Datasheet PDF文件第37页浏览型号A29L160UV-70的Datasheet PDF文件第38页浏览型号A29L160UV-70的Datasheet PDF文件第40页浏览型号A29L160UV-70的Datasheet PDF文件第41页浏览型号A29L160UV-70的Datasheet PDF文件第42页 
A29L160 Series  
Timing Waveforms for Alternate  
Controlled Write Operation  
CE  
PA for program  
SA for sector erase  
555 for chip erase  
555 for program  
2AA for erase  
Data Polling  
PA  
Addresses  
t
WC  
tAS  
t
AH  
tWH  
WE  
OE  
t
WHWH1 or 2  
t
CP  
t
BUSY  
t
CPH  
CE  
t
WS  
t
DS  
t
DH  
Data  
I/O7  
DOUT  
tRH  
A0 for program  
55 for erase  
PD for program  
30 for sector erase  
10 for chip erase  
RESET  
RY/BY  
Note :  
1. PA = Program Address, PD = Program Data, SA = Sector Address, I/  
7O= Complement of Data Input, DOUT = Array Data.  
2. Figure indicates the last two bus cycles of the command sequence.  
Erase and Programming Performance  
Parameter  
Sector Erase Time  
Typ. (Note 1)  
Max. (Note 2)  
Unit  
sec  
sec  
ms  
Comments  
1.0  
35  
35  
12  
11  
8
Excludes 00h programming  
prior to erasure  
Chip Erase Time  
Byte Programming Time  
Word Programming Time  
300  
500  
33  
ms  
Excludes system-level  
overhead (Note 5)  
Byte Mode  
Word Mode  
sec  
Chip Programming Time  
(Note 3)  
7.2  
21.6  
sec  
Notes:  
1. Typical program and erase times assume the following conditions: 25°C, 3.0V VCC, 10,000 cycles. Additionally,  
programming typically assumes checkerboard pattern.  
2. Under worst case conditions of 90°C, VCC = 2.7V, 100,000 cycles.  
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes  
program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only  
then does the device set I/O5 = 1. See the section on I/O5 for further information.  
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.  
5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See  
Table 9 for further information on command definitions.  
6. The device has a guaranteed minimum erase and program cycle endurance of 10,000 cycles.  
PRELIMINARY  
(July, 2002, Version 0.0)  
38  
AMIC Technology, Inc.  

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