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A29DL324TV-120I PDF预览

A29DL324TV-120I

更新时间： 2024-02-05 16:25:57
品牌 Logo 应用领域
联笙电子 - AMICC 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
50页 772K
描述
Flash, 2MX16, 120ns, PDSO48

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A29DL324TV-120I 技术参数

是否Rohs认证：符合生命周期：Contact Manufacturer
包装说明：TSSOP, TSSOP48,.8,20Reach Compliance Code：unknown
风险等级：5.58Is Samacsys：N
最长访问时间：120 ns备用内存宽度：8
启动块：TOP命令用户界面：YES
通用闪存接口：YES数据轮询：YES
JESD-30 代码：R-PDSO-G48内存密度：33554432 bit
内存集成电路类型：FLASH内存宽度：16
部门数/规模：8,63端子数量：48
字数：2097152 words字数代码：2000000
最高工作温度：85 °C最低工作温度：-40 °C
组织：2MX16封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP48,.8,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行：PARALLEL电源：3/3.3 V
认证状态：Not Qualified就绪/忙碌：YES
部门规模：8K,64K最大待机电流：0.000005 A
子类别：Flash Memories最大压摆率：0.045 mA
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
切换位：YES类型：NOR TYPE
Base Number Matches：1

A29DL324TV-120I 数据手册

 浏览型号A29DL324TV-120I的Datasheet PDF文件第3页浏览型号A29DL324TV-120I的Datasheet PDF文件第4页浏览型号A29DL324TV-120I的Datasheet PDF文件第5页浏览型号A29DL324TV-120I的Datasheet PDF文件第7页浏览型号A29DL324TV-120I的Datasheet PDF文件第8页浏览型号A29DL324TV-120I的Datasheet PDF文件第9页 
A29DL32x Series  
DEVICE BUS OPERATIONS  
This section describes the requirements and use of the  
device bus operations, which are initiated through the  
internal command register. The command register itself does  
not occupy any addressable memory location. The register is  
composed of latches that store the commands, along with  
the address and data information needed to execute the  
command. The contents of the register serve as inputs to the  
internal state machine. The state machine outputs dictate the  
function of the device. The appropriate device bus operations  
table lists the inputs and control levels required, and the  
resulting output. The following subsections describe each of  
these operations in further detail.  
Table 1. A29DL32x Device Bus Operations  
Operation  
A0 – A20  
(Note 1)  
I/O0 - I/O7  
I/O8 - I/O15  
=VIH  
/ACC  
WP  
WE  
CE  
OE  
RESET  
=VIL  
BYTE  
BYTE  
Read  
L
L
L
H
L
H
H
L/H  
AIN  
AIN  
DOUT  
DIN  
DOUT  
DIN  
I/O8~I/O15=High-Z  
I/O8~I/O14=High-Z  
I/O15=A-1  
Write  
H
(Note 3)  
Standby  
X
X
H
X
High-Z  
High-Z  
High-Z  
VCC ±  
0.3 V  
VCC ±  
0.3 V  
Output Disable  
Reset  
L
X
L
H
X
H
H
X
L
H
L
L/H  
L/H  
L/H  
X
X
High-Z  
High-Z  
DIN  
High-Z  
High-Z  
X
High-Z  
High-Z  
X
Sector Protect  
(See Note 2)  
VID  
SA, A6=L,  
A1=H, A0=L  
Sector Unprotect  
(See Note 2)  
L
H
X
L
VID  
VID  
(Note 3)  
(Note 3)  
SA, A6=H,  
A1=H, A0=L  
DIN  
X
X
Temporary Sector  
Unprotect  
X
X
AIN  
DIN  
DIN  
High-Z  
Legend:  
L = Logic Low = VIL, H = Logic High = VIH, VID = 8.5 -12.5V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = Sector Address, AIN =  
Address In, DIN= Data In, DOUT = Data Out  
Notes:  
1. Addresses are A20:A0 in word mode (  
=VIH), A20: A-1 in byte mode (  
=VIL).  
BYTE  
BYTE  
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the  
“Sector/Sector Block Protection and Unprotection” section.  
3. If  
/ACC = VIL, the two outermost boot sectors remain protected. If  
/ACC = VIH, the two outermost boot sector  
WP  
WP  
protection depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block  
Protection and Unprotection”. If /ACC = VHH all sectors will be unprotected.  
WP  
PRELIMINARY (May, 2005, Version 0.0)  
5
AMIC Technology, Corp.  
1...3456789...50

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