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A29DL163TV-70UF PDF预览

A29DL163TV-70UF

更新时间: 2024-01-21 13:00:06
品牌 Logo 应用领域
联笙电子 - AMICC 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
47页 738K
描述
Flash, 1MX16, 70ns, PDSO48

A29DL163TV-70UF 技术参数

是否Rohs认证:符合生命周期:Contact Manufacturer
包装说明:TSSOP, TSSOP48,.8,20Reach Compliance Code:unknown
风险等级:5.8Is Samacsys:N
最长访问时间:70 ns备用内存宽度:8
启动块:TOP命令用户界面:YES
通用闪存接口:YES数据轮询:YES
JESD-30 代码:R-PDSO-G48内存密度:16777216 bit
内存集成电路类型:FLASH内存宽度:16
部门数/规模:8,31端子数量:48
字数:1048576 words字数代码:1000000
最高工作温度:85 °C最低工作温度:-40 °C
组织:1MX16封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:PARALLEL电源:3/3.3 V
认证状态:Not Qualified就绪/忙碌:YES
部门规模:8K,64K最大待机电流:0.000005 A
子类别:Flash Memories最大压摆率:0.045 mA
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
切换位:YES类型:NOR TYPE
Base Number Matches:1

A29DL163TV-70UF 数据手册

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A29DL16x Series  
GENERAL DESCRIPTION  
A29DL16x Features  
The A29DL16x family consists of 16 megabit, 3.0 volt-only  
flash memory devices, organized as 1,048,576 words of 16  
bits each or 2,097,152 bytes of 8 bits each. Word mode data  
appears on I/O0–I/O15; byte mode data appears on I/O0–I/O7.  
The device is designed to be programmed in-system with the  
standard 3.0 volt VCC supply, and can also be programmed  
in standard EPROM programmers.  
The device offers complete compatibility with the JEDEC  
single-power-supply Flash command set standard.  
Commands are written to the command register using  
standard microprocessor write timings. Reading data out of  
the device is similar to reading from other Flash or EPROM  
devices.  
The device is available with an access time of 70, 90, or 120  
ns. The devices are offered in 48-pin TSOP and 48-ball Fine-  
The host system can detect whether a program or erase  
operation is complete by using the device status bits:  
pitch BGA. Standard control pins—chip enable (  
), write  
RY/  
pin, I/O7 (  
BY  
Polling) and I/O6/I/O2 (toggle bits).  
Data  
CE  
After a program or erase cycle has been completed, the  
device automatically returns to reading array data.  
The sector erase architecture allows memory sectors to be  
erased and reprogrammed without affecting the data  
contents of other sectors. The device is fully erased when  
shipped from the factory.  
enable (  
), and output enable (  
OE  
)—control normal read  
WE  
and write operations, and avoid bus contention issues.  
The device requires only a single 3.0 volt power supply for  
both read and write functions. Internally generated and  
regulated voltages are provided for the program and erase  
operations.  
Hardware data protection measures include a low VCC  
detector that automatically inhibits write operations during  
power transitions. The hardware sector protection feature  
disables both program and erase operations in any  
combination of the sectors of memory. This can be achieved  
Simultaneous Read/Write Operations with Zero  
Latency  
The Simultaneous Read/Write architecture provides  
simultaneous operation by dividing the memory space into  
two banks. The device can improve overall system  
in-s y s t e m or via programming equipment.  
The device offers two power-saving features. When  
addresses have been stable for a specified amount of time,  
the device enters the automatic sleep mode. The system  
can also place the device into the standby mode. Power  
consumption is greatly reduced in both modes.  
performance by allowing a host system to program or erase  
in one bank, then immediately and simultaneously read from  
the other bank, with zero latency. This releases the system  
from waiting for the completion of program or erase  
operations.  
The A29DL16x devices uses multiple bank architectures to  
provide flexibility for different applications. Three devices are  
available with these bank sizes:  
Device  
DL162  
DL163  
DL164  
Bank 1  
2 Mb  
Bank 2  
14 Mb  
12 Mb  
8 Mb  
4 Mb  
8 Mb  
PRELIMINARY (September, 2004, Version 0.0)  
2
AMIC Technology, Corp.  

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