A29512 Series
The host system can detect whether a program or erase
operation is complete by reading the I/O7 ( Polling) and
I/O6 (toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data or
accept another command.
The sector erase architecture allows memory sectors to be
erased and reprogrammed without affecting the data
contents of other sectors. The A29512 is fully erased when
shipped from the factory.
sectors of memory. This can be achieved via programming
equipment.
The Erase Suspend feature enables the user to put erase on
hold for any period of time to read data from, or program data
to, any other sector that is not selected for erasure. True
background erase can thus be achieved.
Data
Power consumption is greatly reduced when the device is
placed in the standby mode.
The hardware sector protection feature disables operations
for both program and erase in any combination of the
Pin Configurations
nDIP
nPLCC
1
VCC
WE
NC
32
31
30
NC
NC
2
3
4
A15
A12
A7
A6
A5
A4
A3
A2
A14
A13
A8
29
28
27
26
5
6
7
8
A14
A13
A8
A7
A6
A5
A4
29
28
27
26
25
24
23
22
21
5
6
A9
7
A9
8
A11
25
24
23
22
A11
OE
A10
CE
9
A29512L
A3
A2
OE
9
10
A10
10
11
12
13
14
15
16
11
12
13
CE
A1
A0
A1
A0
I/O7
21
20
19
18
17
I/O0
I/O1
I/O2
VSS
I/O7
I/O6
I/O5
I/O4
I/O3
I/O0
nTSOP (Forward type)
A11
A9
A8
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
A13
A14
NC
WE
VCC
NC
NC
A15
A12
A7
I/O
I/O
I/O
I/O
I/O
7
6
5
4
3
A29512V
9
VSS
10
11
12
13
14
15
16
I/O
I/O
I/O
A0
A1
A2
A3
2
1
0
A6
A5
A4
PRELIMINARY
(November, 2001, Version 0.0)
2
AMIC Technology, Inc.