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A29040A-70 PDF预览

A29040A-70

更新时间: 2024-01-13 21:23:54
品牌 Logo 应用领域
联笙电子 - AMICC /
页数 文件大小 规格书
30页 287K
描述
512K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory

A29040A-70 技术参数

是否Rohs认证: 不符合生命周期:Contact Manufacturer
包装说明:DIP, DIP32,.6Reach Compliance Code:unknown
风险等级:5.8最长访问时间:70 ns
命令用户界面:YES数据轮询:YES
耐久性:100000 Write/Erase CyclesJESD-30 代码:R-PDIP-T32
长度:41.91 mm内存密度:4194304 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1部门数/规模:8
端子数量:32字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP32,.6
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified座面最大高度:5.334 mm
部门规模:64K最大待机电流:0.000005 A
子类别:Flash Memories最大压摆率:0.04 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:15.24 mm
Base Number Matches:1

A29040A-70 数据手册

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A29040A Series  
verifying sector protection, the sector address must appear  
on the appropriate highest order address bits. Refer to the  
corresponding Sector Address Tables. The Command  
Definitions table shows the remaining address bits that are  
don't care. When all necessary bits have been set as  
required, the programming equipment may then read the  
corresponding identifier code on I/O7 - I/O0.To access the  
autoselect codes in-system, the host system can issue the  
autoselect command via the command register, as shown  
in the Command Definitions table. This method does not  
require VID. See "Command Definitions" for details on  
using the autoselect mode.  
Autoselect Mode  
The autoselect mode provides manufacturer and device  
identification, and sector protection verification, through  
identifier codes output on I/O7 - I/O0. This mode is primarily  
intended for programming equipment to automatically  
match a device to be programmed with its corresponding  
programming algorithm. However, the autoselect codes  
can also be accessed in-system through the command  
register.  
When using programming equipment, the autoselect mode  
requires VID (11.5V to 12.5 V) on address pinA9. Address  
pins A6, A1, and AO must be as shown in Autoselect  
Codes (High Voltage Method) table. In addition, when  
Table 3. A29040A Autoselect Codes (High Voltage Method)  
Identifier Code on  
I/O7 - I/O0  
Description  
A18 - A16 A15 - A10 A9  
A8 - A7 A6 A5 - A2 A1  
AO  
Manufacturer ID: AMIC  
Device ID: A29040A  
X
X
X
X
VID  
VID  
X
X
VIL  
VIL  
X
X
VIL  
VIL  
VIL  
VIH  
37h  
86h  
0lh (protected)  
00h (unprotected)  
Sector Protection  
Verification  
Sector  
Address  
X
VID  
VID  
X
X
VIL  
VIL  
X
X
VIH  
VIH  
VIL  
VIH  
Continuation ID  
X
X
7Fh  
Sector Protection/Unprotection  
Write Pulse "Glitch" Protection  
The hardware sector protection feature disables both  
program and erase operations in any sector. The hardware  
sector unprotection feature re-enables both program and  
erase operations in previously protected sectors.  
Noise pulses of less than 5ns (typical) on  
do not initiate a write cycle.  
,
or  
OE CE  
WE  
Logical Inhibit  
Sector protection/unprotection must be implemented using  
programming equipment. The procedure requires a high  
voltage (VID) on address pin A9 and the control pins.  
The device is shipped with all sectors unprotected.  
It is possible to determine whether a sector is protected or  
unprotected. See "Autoselect Mode" for details.  
Write cycles are inhibited by holding any one of  
=VIL,  
OE  
CE  
= VIH or  
= VIH. To initiate a write cycle,  
and  
CE  
WE  
must be a logical zero while  
is a logical one.  
OE  
WE  
Power-Up Write Inhibit  
If  
Hardware Data Protection  
=
= VIL and  
= VIH during power up, the  
OE  
WE  
device does not accept commands on the rising edge of  
. The internal state machine is automatically reset to  
CE  
The requirement of command unlocking sequence for  
programming or erasing provides data protection against  
inadvertent writes (refer to the Command Definitions table).  
In addition, the following hardware data protection measures  
prevent accidental erasure or programming, which might  
otherwise be caused by spurious system level signals during  
VCC power-up transitions, or from system noise. The device  
is powered up to read array data to avoid accidentally writing  
data to the array.  
WE  
reading array data on the initial power-up.  
PRELIMINARY  
(August, 2001, Version 0.1)  
6
AMIC Technology, Inc.  

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