5秒后页面跳转
A25L80PQ-F PDF预览

A25L80PQ-F

更新时间: 2024-01-21 10:33:56
品牌 Logo 应用领域
联笙电子 - AMICC 时钟光电二极管内存集成电路
页数 文件大小 规格书
37页 462K
描述
Flash, 1MX8, PDSO8, QFN-8

A25L80PQ-F 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
包装说明:HVSON, SOLCC8,.25Reach Compliance Code:unknown
风险等级:5.69其他特性:IT ALSO OPERATES AT FREQUENCY 50 MHZ AT 2.7 TO 3.6 V SUPPLY VOLTAGE
最大时钟频率 (fCLK):75 MHz数据保留时间-最小值:20
耐久性:100000 Write/Erase CyclesJESD-30 代码:R-PDSO-N8
长度:6 mm内存密度:8388608 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1端子数量:8
字数:1048576 words字数代码:1000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:1MX8
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装等效代码:SOLCC8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE并行/串行:SERIAL
电源:3/3.3 V编程电压:2.7 V
认证状态:Not Qualified座面最大高度:0.8 mm
串行总线类型:SPI最大待机电流:0.00001 A
子类别:Flash Memories最大压摆率:0.015 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:NO LEAD端子节距:1.27 mm
端子位置:DUAL类型:NOR TYPE
宽度:5 mm写保护:HARDWARE/SOFTWARE
Base Number Matches:1

A25L80PQ-F 数据手册

 浏览型号A25L80PQ-F的Datasheet PDF文件第7页浏览型号A25L80PQ-F的Datasheet PDF文件第8页浏览型号A25L80PQ-F的Datasheet PDF文件第9页浏览型号A25L80PQ-F的Datasheet PDF文件第11页浏览型号A25L80PQ-F的Datasheet PDF文件第12页浏览型号A25L80PQ-F的Datasheet PDF文件第13页 
A25L80P Series  
Write Enable (WREN)  
The Write Enable (WREN) instruction (Figure 4.) sets the  
Write Enable Latch (WEL) bit.  
The Write Enable Latch (WEL) bit must be set prior to every  
Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and  
Write Status Register (WRSR) instruction.  
The Write Enable (WREN) instruction is entered by driving  
Chip Select ( ) Low, sending the instruction code, and then  
S
driving Chip Select ( ) High.  
S
Figure 4. Write Enable (WREN) Instruction Sequence  
S
0
1
2
3
4
5
6
7
C
D
Instruction  
High Impedance  
Q
Write Disable (WRDI)  
Power-up  
The Write Disable (WRDI) instruction (Figure 5.) resets the  
Write Disable (WRDI) instruction completion  
Write Status Register (WRSR) instruction completion  
Page Program (PP) instruction completion  
Sector Erase (SE) instruction completion  
Bulk Erase (BE) instruction completion  
Write Enable Latch (WEL) bit.  
The Write Disable (WRDI) instruction is entered by driving  
S
Chip Select ( ) Low, sending the instruction code, and then  
driving Chip The Write Enable Latch (WEL) bit is reset under  
the following conditions:  
Figure 5. Write Disable (WRDI) Instruction Sequence  
S
0
1
2
3
4
5
6
7
C
D
Instruction  
High Impedance  
Q
(April, 2007, Version 1.5)  
9
AMIC Technology Corp.  

与A25L80PQ-F相关器件

型号 品牌 获取价格 描述 数据表
A25L80PQ-U AMICC

获取价格

Flash, 8MX1, 6 X 5 MM, 0.80 MM PITCH, QFN-8
A25L80PQ-UF AMICC

获取价格

Flash, 8MX1, 6 X 5 MM, 0.80 MM PITCH, ROHS COMPLIANT, QFN-8
A25L80P-UF AMICC

获取价格

Flash, 1MX8, PDIP8, DIP-8
A25P1NA-103-10 MOLEX

获取价格

RF MCX Connector, Male, Cable Mount, Crimp Terminal, Plug
A25P1NA-103-10G MOLEX

获取价格

RF MCX Connector, Male, Cable Mount, Crimp Terminal, Plug,
A25P1NA-104-10 MOLEX

获取价格

RF MCX Connector, Male, Cable Mount, Crimp Terminal, Plug,
A25P1NA-104-10G MOLEX

获取价格

RF MCX Connector, Male, Cable Mount, Crimp Terminal, Plug,
A25P1NA-111-10 MOLEX

获取价格

RF MCX Connector, Male, Cable Mount, Crimp Terminal, Plug
A25P1NA-111-10G MOLEX

获取价格

RF MCX Connector, Male, Cable Mount, Crimp Terminal, Plug,
A25P1NA-201-10 MOLEX

获取价格

RF MCX Connector, 1 Contact(s), Male, Cable Mount, Crimp Terminal, Plug