Datasheet > A25L16PN-F

A25L16PN-F

更新时间： 2024-02-27 19:08:38

品牌	Logo	应用领域
联笙电子 - AMICC		光电二极管
页数	文件大小	规格书
37页	582K
描述
Flash, 16MX1, PDSO16, 0.300 INCH, LEAD FREE, SOP-16

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

A25L16PN-F 数据手册

A25L16P Series

Table 1. Protected Area Sizes

Status Register Content

Memory Content

BP2 Bit

BP1 Bit

BP0 Bit

Protected Area

Unprotected Area

none

All sectors¹(32 sectors: 0 to 31)

Lower 31/32nds (31 sectors: 0 to 30)

Lower 15/16ths (30 sectors: 0 to 29)

Lower seven-eighths (28 sectors: 0 to 27)

Lower three-quarters (24 sectors: 0 to 23)

Lower half (16 sectors: 0 to 15)

none

Upper 32nd (sector 31)

Upper sixteenth (two sectors: 30 and 31)

Upper eighth (four sectors: 28 to 31)

Upper quarter (eight sectors: 24 to 31)

Upper half (sixteen sectors: 16 to 31)

All sectors (32 sectors: 0 to 31)

none

Note: 1. The device is ready to accept a Bulk Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) are 0.

2. The sector 0 include sector 0-0, sector 0-1, sector 0-2 and sector 0-3.

Hold Condition

During the Hold condition, the Serial Data Output (Q) is high

impedance, and Serial Data Input (D) and Serial Clock (C) are

Don’t Care.

The Hold (

) signal is used to pause any serial

HOLD

communications with the device without resetting the clocking

sequence. However, taking this signal Low does not terminate

any Write Status Register, Program or Erase cycle that is

currently in progress.

Normally, the device is kept selected, with Chip Select (

)

To enter the Hold condition, the device must be selected, with

driven Low, for the whole duration of the Hold condition. This is

to ensure that the state of the internal logic remains unchanged

from the moment of entering the Hold condition.

Chip Select ( ) Low.

The Hold condition starts on the falling edge of the Hold

If Chip Select ( ) goes High while the device is in the Hold

condition, this has the effect of resetting the internal logic of the

device. To restart communication with the device, it is

(

) signal, provided that this coincides with Serial Clock

HOLD

The Hold condition ends on the rising edge of the Hold (

)

HOLD

necessary to drive Hold (

) High, and then to drive Chip

HOLD

signal, provided that this coincides with Serial Clock (C) being

Low.

Select ( ) Low. This prevents the device from going back to

If the falling edge does not coincide with Serial Clock (C) being

Low, the Hold condition starts after Serial Clock (C) next goes

Low. Similarly, if the rising edge does not coincide with Serial

Clock (C) being Low, the Hold condition ends after Serial Clock

the Hold condition.

Figure 3. Hold Condition Activation

HOLD

Hold

Condition

(standard use)

(non-standard use)

PRELIMINARY (March, 2006, Version 0.2)

AMIC Technology Corp.

1...4 5 678 9 10...37

下载PDF

与A25L16PN-F相关器件

型号	品牌	描述	获取价格	数据表
A25L16PN-U	AMICC	Flash, 16MX1, PDSO16, 0.300 INCH, SOP-16	获取价格
A25L16PN-UF	AMICC	Flash, 16MX1, PDSO16, 0.300 INCH, LEAD FREE, SOP-16	获取价格
A25L16PTM-F	AMICC	16 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface	获取价格
A25L16PTM-UF	AMICC	16 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface	获取价格
A25L16PTN-F	AMICC	16 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface	获取价格
A25L16PTN-UF	AMICC	16 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface	获取价格

与A25L16PN-F相关文章

SI2301 N沟道MOSFET：资料手册参数分析
2024-05-08

9
ADC0809逐次逼近寄存器型模数转换器：资料手册参数分析
2024-05-08

7
AD9361捷变收发器：全面参数解析与关键特性概览
2024-05-08

6
IRF3205功率MOSFET：资料手册参数分析
2024-05-08

7

产品中心

服务支持

精选活动

关于我们

帮助中心

A25L16PN-F

A25L16PN-F 数据手册

与A25L16PN-F相关器件

与A25L16PN-F相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

A25L16PN-F

A25L16PN-F 数据手册

与A25L16PN-F相关器件

与A25L16PN-F相关文章

您还可以找

您在本页遇到什么问题？