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A14100A-1CQ256C PDF预览

A14100A-1CQ256C

更新时间: 2024-02-29 13:14:25
品牌 Logo 应用领域
ACTEL /
页数 文件大小 规格书
98页 1852K
描述
HiRel FPGAs

A14100A-1CQ256C 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:CERAMIC, CQFP-256Reach Compliance Code:compliant
风险等级:5.9其他特性:25000 PLD EQUIVALENT GATES AVAILABLE
最大时钟频率:100 MHzCLB-Max的组合延迟:3 ns
JESD-30 代码:S-CQFP-F256JESD-609代码:e0
长度:36 mm可配置逻辑块数量:1377
等效关口数量:30000输入次数:228
逻辑单元数量:1377输出次数:228
端子数量:256最高工作温度:125 °C
最低工作温度:-55 °C组织:1377 CLBS, 30000 GATES
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QFF
封装等效代码:TPAK256,3SQ,20封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):225
电源:5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:3.06 mm
子类别:Field Programmable Gate Arrays最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:TIN LEAD
端子形式:FLAT端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:36 mmBase Number Matches:1

A14100A-1CQ256C 数据手册

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HiRel FPGAs  
ACT 3 Description  
unique architecture offers gate array flexibility, high  
performance, and quick turnaround through user  
programming. Device utilization is typically 95 percent of  
available logic modules. All Actel devices include on-chip  
clock drivers and a hard-wired distribution network.  
The ACT 3 family is the third-generation Actel FPGA  
family. This family offers the highest-performance and  
highest-capacity devices, ranging from 2,500 to 10,000 gates,  
with system performance up to 60 MHz over the military  
temperature range. The devices have four clock distribution  
networks, including dedicated array and I/O clocks. In  
addition, the ACT 3 family offers the highest I/O-to-gate ratio  
available. ACT 3 devices are manufactured using 0.8µ CMOS  
technology.  
User-definable I/Os are capable of driving at both TTL and  
CMOS drive levels. Available packages for the military are the  
Ceramic Quad Flat Pack (CQFP) and the Ceramic Pin Grid  
Array (CPGA). See the “Product Plan” section on page 6 for  
details.  
QML Certification  
1200XL/3200DX Description  
Actel has achieved full QML certification, demonstrating  
that quality management, procedures, processes, and  
controls are in place and comply with MIL-PRF-38535, the  
performance specification used by the Department of  
Defense for monolithic integrated circuits. QML  
certification is a good example of Actel's commitment to  
supplying the highest quality products for all types of  
high-reliability, military and space applications.  
3200DX and 1200XL FPGAs were designed to integrate  
system logic which is typically implemented in multiple  
CPLDs, PALs, and FPGAs. These devices provide the features  
and performance required for today’s complex, high-speed  
digital logic systems. The 3200DX family offers the industry’s  
fastest dual-port SRAM for implementing fast FIFOs, LIFOs,  
and temporary data storage.  
ACT 2 Description  
Many suppliers of microelectronics components have  
implemented QML as their primary worldwide business  
system. Appropriate use of this system not only helps in the  
implementation of advanced technologies, but also allows  
for a quality, reliable and cost-effective logistics support  
throughout QML products’ life cycles.  
The ACT 2 family is the second-generation Actel FPGA family.  
This family offers the best-value, high-capacity devices,  
ranging from 4,000 to 8,000 gates, with system performance  
up to 40 MHz over the military temperature range. The  
devices have two routed array clock distribution networks.  
ACT 2 devices are manufactured using 1.0µ CMOS technology.  
Development Tool Support  
ACT 1 Description  
The HiRel devices are fully supported by Actel’s line of FPGA  
development tools, including the Actel DeskTOP series and  
Designer Advantage tools. The Actel DeskTOP Series is an  
integrated design environment for PCs that includes design  
entry, simulation, synthesis, and place and route tools.  
Designer Advantage is Actel’s suite of FPGA development  
point tools for PCs and Workstations that includes the  
ACTgen Macro Builder, Designer with DirectTime timing  
driven place and route and analysis tools, and device  
programming software.  
The ACT 1 family is the first Actel FPGA family and the first  
antifuse-based FPGA. This family offers the lowest-cost logic  
integration, with devices ranging from 1,200 to 2,000 gates,  
with system performance up to 20 MHz over the military  
temperature range. The devices have one routed array clock  
distribution network. ACT 1 devices are manufactured using  
1.0µ CMOS technology.  
In addition, the HiRel devices contain ActionProbe circuitry  
that provides built-in access to every node in a design,  
enabling 100 percent real-time observation and analysis of a  
device’s internal logic nodes without design iteration. The  
probe circuitry is accessed by Silicon Explorer, an easy to use  
integrated verification and logic analysis tool that can sample  
data at 100 MHz (asynchronous) or 66 MHz (synchronous).  
Silicon Explorer attaches to a PC’s standard COM port,  
turning the PC into a fully functional 18 channel logic  
analyzer. Silicon Explorer allows designers to complete the  
design verification process at their desks and reduces  
verification time from several hours per cycle to a few  
seconds.  
3

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