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A14100A-1CQ256M PDF预览

A14100A-1CQ256M

更新时间: 2024-10-30 06:34:23
品牌 Logo 应用领域
ACTEL 现场可编程门阵列可编程逻辑时钟
页数 文件大小 规格书
98页 1852K
描述
HiRel FPGAs

A14100A-1CQ256M 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:CERAMIC, CQFP-256Reach Compliance Code:compliant
风险等级:5.89其他特性:25000 PLD EQUIVALENT GATES AVAILABLE
最大时钟频率:100 MHzCLB-Max的组合延迟:3 ns
JESD-30 代码:S-CQFP-F256JESD-609代码:e0
长度:36 mm可配置逻辑块数量:1377
等效关口数量:30000输入次数:228
逻辑单元数量:1377输出次数:228
端子数量:256最高工作温度:125 °C
最低工作温度:-55 °C组织:1377 CLBS, 30000 GATES
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QFF
封装等效代码:TPAK256,3SQ,20封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):225
电源:5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:3.06 mm
子类别:Field Programmable Gate Arrays最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:TIN LEAD
端子形式:FLAT端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:36 mmBase Number Matches:1

A14100A-1CQ256M 数据手册

 浏览型号A14100A-1CQ256M的Datasheet PDF文件第2页浏览型号A14100A-1CQ256M的Datasheet PDF文件第3页浏览型号A14100A-1CQ256M的Datasheet PDF文件第4页浏览型号A14100A-1CQ256M的Datasheet PDF文件第5页浏览型号A14100A-1CQ256M的Datasheet PDF文件第6页浏览型号A14100A-1CQ256M的Datasheet PDF文件第7页 
v3.0  
HiRel FPGAs  
Features  
• Low-Power 0.8µ CMOS Technology  
• Highly Predictable Performance with 100% Automatic  
Placement and Routing  
3200DX Features  
• 100 MHz System Logic Integration  
• Device Sizes from 1,200 to 20,000 Gates  
• Up to 6 Fast, Low-Skew Clock Networks  
• Up to 202 User-Programmable I/O Pins  
• More Than 500 Macro Functions  
• Up to 1,276 Dedicated Flip-Flops  
• I/O Drive to 10 mA  
• Highest Speed FPGA SRAM, up to 2.5 kbits Configurable  
Dual-Port SRAM  
• Fast Wide-Decode Circuitry  
• Low-Power 0.6µ CMOS Technology  
1200XL Features  
• Pin for Pin Compatible with ACT 2  
• System Performance to 50 MHz over Military Temperature  
• Low-Power 0.6µ CMOS Technology  
• Devices Available to DSCC SMD  
• CQFP and CPGA Packaging  
• Nonvolatile, User Programmable  
• Logic Fully Tested Prior to Shipment  
• 100% Military Temperature Tested (–55°C to +125°C)  
• QML Certified Devices  
ACT 2 Features  
• Best-Value, High-Capacity FPGA Family  
• System Performance to 40 MHz over Military Temperature  
• Low-Power 1.0µ CMOS Technology  
• Proven Reliability Data Available  
• Successful Military/Avionics Supplier for Over 10 Years  
ACT 1 Features  
ACT 3 Features  
• Lowest-Cost FPGA Family  
• Highest-Performance, Highest-Capacity FPGA Family  
• System Performance to 60 MHz over Military Temperature  
• System Performance to 20 MHz over Military Temperature  
• Low-Power 1.0µ CMOS Technology  
Product Family Profile (more devices on page 2)  
Family  
Device  
3200DX  
ACT 3  
1200XL  
A32100DX A32200DX  
A1425A  
A1460A  
A14100A  
A1280XL  
Capacity  
System Gates  
Logic Gates  
SRAM Bits  
15,000  
10,000  
2,048  
30,000  
20,000  
2,560  
3,750  
2,500  
NA  
9,000  
6,000  
NA  
15,000  
10,000  
NA  
12,000  
8,000  
Logic Modules  
S-Modules  
C-Modules  
Decode  
1,362  
700  
662  
20  
2,414  
1,230  
1,184  
24  
310  
160  
150  
NA  
848  
432  
416  
NA  
1,377  
697  
680  
NA  
1,232  
624  
608  
NA  
Flip-Flops (Maximum)  
User I/Os (Maximum)  
738  
152  
1,276  
202  
435  
100  
976  
168  
1,493  
228  
998  
140  
Performance  
System Speed (maximum)  
55 MHz  
84  
55 MHz  
60 MHz  
60 MHz  
60 MHz  
50 MHz  
Packages (by Pin Count)  
CPGA  
CQFP  
133  
132  
207  
196  
257  
256  
176  
172  
208, 256  
January 2000  
1
© 2000 Actel Corporation  

A14100A-1CQ256M 替代型号

型号 品牌 替代类型 描述 数据表
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