A1381, A1382,
A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output
Available in a Miniature Thin Profile Surface Mount Package
Characteristic Definitions
Quiescent Voltage Output In the quiescent state (no significant
magnetic field: B = 0 G), the output, VOUT(Q), has a constant
ratio to the supply voltage, VCC, throughout the entire operating
ranges of VCC and ambient temperature, TA.
Power-On Time When the supply is ramped to its operating
voltage, the device requires a finite time to power its inter-
nal components before responding to an input magnetic field.
Power-On Time, tPO, is defined as: the time it takes for the out-
put voltage to settle within ±10% of its steady state value under
an applied magnetic field, after the power supply has reached its
minimum specified operating voltage, VCC(min), as shown in the
Guaranteed Quiescent Voltage Output Range The quiescent
voltage output, VOUT(Q), can be programmed around its nominal
value of 2.5 V, within the guaranteed quiescent voltage range
limits: VOUT(Q)(min) and VOUT(Q)(max). The available guaran-
teed programming range for VOUT(Q) falls within the distributions
of the initial, VOUT(Q)init, and the maximum programming code
for setting VOUT(Q), as shown in the following diagram.
following chart.
V
VCC
VCC(typ.)
VOUT
90% VOUT
VOUT(Q)init(typ)
VCC(min.)
tPO
Guaranteed Output
Programming
Range, VOUT(Q)
t1
t2
t1= time at which power supply reaches
minimum specified operating voltage
Distribution for
VOUT(Q)init
Distribution for
t2= time at which output voltage settles
within ±10% of its steady state value
under an applied magnetic field
Max Code VOUT(Q)
VOUT(Q)(min)
VOUT(Q)(max)
0
+t
Average Quiescent Voltage Output Step Size The average qui-
escent voltage output step size for a single device is determined
using the following calculation:
Delay to Clamp A large magnetic input step may cause the
clamp to overshoot its steady state value. The Delay to Clamp,
tCLP, is defined as: the time it takes for the output voltage to
settle within ±1% of its steady state value, after initially passing
through its steady state voltage, as shown in the following chart.
VOUT(Q)maxcode –VOUT(Q)init
.
StepVOUT(Q)
=
(1)
2n–1
where:
Magnetic Input
V
n is the number of available programming bits in the trim
range,
VCLP(HIGH)
2n–1 is the value of the maximum programming code in the
range, and
VOUT
tCLP
VOUT(Q)maxcode is the quiescent voltage output at code 2n–1.
t1
t2
Quiescent Voltage Output Programming Resolution The pro-
gramming resolution for any device is half of its programming
step size. Therefore, the typical programming resolution will be:
t1= time at which output voltage initially
reaches steady state clamp voltage
ErrPGVOUT(Q)(typ)
.
t2= time at which output voltage settles to
within 1% of steady state clamp voltage
= 0.5 × StepVOUT(Q)(typ)
(2)
Note: Times apply to both high clamp
(shown) and low clamp.
0
t
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
7
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com