74LVC2G66
Bilateral switch
Rev. 01 — 29 June 2004
Product data sheet
1. General description
The 74LVC2G66 is a high-performance, low-power, low-voltage, Si-gate CMOS device.
The 74LVC2G66 provides two analog switches. Each switch has a input and output (pins
Yand Z) and an active HIGH enable input (pin E). When pin E is LOW, the analog switch
is turned off.
2. Features
■ Wide supply voltage range from 1.65 V to 5.5 V
■ Very low ON-resistance:
◆ 7.5 Ω (typical) at VCC = 2.7 V
◆ 6.5 Ω (typical) at VCC = 3.3 V
◆ 6 Ω (typical) at VCC = 5 V.
■ High noise immunity
■ Complies with JEDEC standard:
◆ JESD8-7 (1.65 V to 1.95 V)
◆ JESD8-5 (2.3 V to 2.7 V)
◆ JESD8-B/JESD36 (2.7 V to 3.6 V).
■ ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ CMOS low-power consumption
■ Latch-up performance meets requirements of JESD78 Class I
■ Direct interface with TTL levels
■ Enable inputs accept voltages up to 5 V
■ SOT505-2 and SOT765-1 package
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C.
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
Symbol Parameter
Conditions
Min Typ Max Unit
tPZH, tPZL turn-on time nE to VOS
CL = 50 pF; RL = 500 Ω
VCC = 3 V
-
-
2.4
1.8
-
-
ns
ns
VCC = 5 V