74LVC2G66

更新时间： 2024-02-10 19:01:03

品牌	Logo	应用领域
恩智浦 - NXP		开关
页数	文件大小	规格书
22页	141K
描述
Bilateral switch

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技术参数
数据手册

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74LVC2G66 技术参数

Source Url Status Check Date：	2013-06-14 00:00:00	是否无铅：	含铅
是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	unknown	风险等级：	5.77
Base Number Matches：	1

74LVC2G66 数据手册

74LVC2G66

Bilateral switch

Rev. 01 — 29 June 2004

Product data sheet

1. General description

The 74LVC2G66 is a high-performance, low-power, low-voltage, Si-gate CMOS device.

The 74LVC2G66 provides two analog switches. Each switch has a input and output (pins

Yand Z) and an active HIGH enable input (pin E). When pin E is LOW, the analog switch

is turned off.

2. Features

■ Wide supply voltage range from 1.65 V to 5.5 V

■ Very low ON-resistance:

◆ 7.5 Ω (typical) at V_CC= 2.7 V

◆ 6.5 Ω (typical) at V_CC= 3.3 V

◆ 6 Ω (typical) at V_CC= 5 V.

■ High noise immunity

■ Complies with JEDEC standard:

◆ JESD8-7 (1.65 V to 1.95 V)

◆ JESD8-5 (2.3 V to 2.7 V)

◆ JESD8-B/JESD36 (2.7 V to 3.6 V).

■ ESD protection:

◆ HBM EIA/JESD22-A114-B exceeds 2000 V

◆ MM EIA/JESD22-A115-A exceeds 200 V.

■ CMOS low-power consumption

■ Latch-up performance meets requirements of JESD78 Class I

■ Direct interface with TTL levels

■ Enable inputs accept voltages up to 5 V

■ SOT505-2 and SOT765-1 package

■ Speciﬁed from −40 °C to +85 °C and −40 °C to +125 °C.

3. Quick reference data

Table 1:

Quick reference data

GND = 0 V; T_amb= 25 °C; t_r= t_f≤ 2.5 ns.

Symbol Parameter

Conditions

Min Typ Max Unit

t_PZH, t_PZLturn-on time nE to V_OS

C_L= 50 pF; R_L= 500 Ω

V_CC= 3 V

2.4

1.8

V_CC= 5 V

12 3 4 5 6 7...22

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