Datasheet > CY81U016X16A9A-7N4FI

CY81U016X16A9A-7N4FI

更新时间： 2024-02-26 18:17:21

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器内存集成电路
页数	文件大小	规格书
14页	204K
描述
Standard SRAM, 1MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, FBGA-48

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

CY81U016X16A9A-7N4FI 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	6 X 8 MM, 1 MM HEIGHT, FBGA-48	针数：	48
Reach Compliance Code：	compliant	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.92
最长访问时间：	70 ns	I/O 类型：	COMMON
JESD-30 代码：	R-PBGA-B48	JESD-609代码：	e0
长度：	8 mm	内存密度：	16777216 bit
内存集成电路类型：	STANDARD SRAM	内存宽度：	16
湿度敏感等级：	3	功能数量：	1
端子数量：	48	字数：	1048576 words
字数代码：	1000000	工作模式：	ASYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-25 °C
组织：	1MX16	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	VFBGA
封装等效代码：	BGA48,6X8,30	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	240	电源：	1.8/3,2.5/3 V
认证状态：	Not Qualified	座面最大高度：	1 mm
最大待机电流：	0.00008 A	最小待机电流：	2.3 V
子类别：	SRAMs	最大压摆率：	0.015 mA
最大供电电压 (Vsup)：	3.1 V	最小供电电压 (Vsup)：	2.3 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	OTHER
端子面层：	TIN LEAD	端子形式：	BALL
端子节距：	0.75 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	30	宽度：	6 mm
Base Number Matches：	1

CY81U016X16A9A-7N4FI 数据手册

浏览型号CY81U016X16A9A-7N4FI的Datasheet PDF文件第2页

浏览型号CY81U016X16A9A-7N4FI的Datasheet PDF文件第3页

浏览型号CY81U016X16A9A-7N4FI的Datasheet PDF文件第4页

浏览型号CY81U016X16A9A-7N4FI的Datasheet PDF文件第5页

浏览型号CY81U016X16A9A-7N4FI的Datasheet PDF文件第6页

CY81U016X16A9A

MoBL3™

PRELIMINARY

16M (1M x 16) SRAM

(OE HIGH), or during a write operation (CE LOW and WE

LOW).

Features

• Very high speed: 70 ns

• Advanced low-power MoBL architecture

• Wide voltage range:

Writing to the device is accomplished by taking Chip Enable

(CE) LOW and Write Enable (WE) input LOW. If Byte Low

Enable (BLE) is LOW, then data from I/O pins (I/O₀through

I/O₇), is written into the location specified on the address pins

(A₀through A₁₉). If Byte High Enable (BHE) is LOW, then data

from I/O pins (I/O₈through I/O₁₅) is written into the location

specified on the address pins (A₀through A₁₉).

— V_CCrange: 2.3V – 3.1V

— V_CCQ(I/O) range: 1.7V – V_CC

• Ultra-low active, standby power

• Easy memory expansion with CE and OE features

• 1T SRAM memory cell

• Automatic power-down when deselected

• CMOS for optimum speed/power

Reading from the device is accomplished by taking Chip

Enable (CE) LOW and Output Enable (OE) LOW while forcing

the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is

LOW, then data from the memory location specified by the

address pins will appear on I/O₀to I/O₇. If Byte High Enable

(BHE) is LOW, then data from memory will appear on I/O₈to

I/O₁₅. See the truth table at the back of this datasheet for a

complete description of read and write modes.

Functional Description^[1]

The MoBL3™ is a high-performance CMOS static RAM

organized as 1M words by 16 bits. This device features

advanced circuit design to provide ultra-low active current.

This is ideal for providing More Battery Life™ (MoBL) in

portable applications such as cellular telephones. The device

can be put into standby mode when deselected (CE HIGH, or

both BLE and BHE HIGH). The input/output pins (I/O₀through

I/O₁₅) are placed in a high-impedance state when: deselected

(CE HIGH, or both BLE and BHE HIGH), outputs are disabled

This SRAM has multiple power down functions. The ZZ pin will

put the SRAM into a deep sleep mode, where the data is not

retained in the SRAM. The Variable Address Mode allows the

user to retain data in a section of the SRAM and reduce the

standby current. The CY81U016X16A9A has the deep sleep

mode disabled on power-up. The VAR register can be used to

enable the deep sleep mode.

The MoBL3 is available in a 48-Ball FBGA package.

Logic Block Diagram

DATA IN DRIVERS

A¹⁰

A₈

A₇

A₆

A₅

A₄

1M x 16

RAM Array

I/O₀–I/O₇

A₃

I/O₈–I/O₁₅

A₂

A₁

A₀

COLUMN DECODER

Refresh/Power-down

Circuit

BHE

BLE

Power-down

Circuit

BHE

BLE

Note:

1. For best practice recommendations, please refer to the CY application note “System Design Guidelines” on http://www.cypress.com.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-05310 Rev. **

Revised September 10, 2002

12 3 4 5 6 7...14

下载PDF

与CY81U016X16A9A-7N4FI相关器件

型号	品牌	描述	获取价格	数据表
CY81U016X16B7A-8N4FII	CYPRESS	Standard SRAM, 1MX16, 85ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, FBGA-48	获取价格
CY81U032X16A9A-7N4FI	CYPRESS	Standard SRAM, 2MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, FBGA-48	获取价格
CY81U032X16A9A-8N4FI	CYPRESS	Standard SRAM, 2MX16, 85ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, FBGA-48	获取价格
CY82C597	CYPRESS	Multifunction Peripheral, CMOS, PQFP160	获取价格
CY82C597-NC	CYPRESS	Multifunction Peripheral, CMOS, PQFP16, PLASTIC, QFP-160	获取价格
CY82C599NCR	CYPRESS	PCI Bus Controller, CMOS, PQFP160, PLASTIC, QFP-160	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

CY81U016X16A9A-7N4FI

CY81U016X16A9A-7N4FI 技术参数

CY81U016X16A9A-7N4FI 数据手册

与CY81U016X16A9A-7N4FI相关器件

与CY81U016X16A9A-7N4FI相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CY81U016X16A9A-7N4FI

CY81U016X16A9A-7N4FI 技术参数

CY81U016X16A9A-7N4FI 数据手册

与CY81U016X16A9A-7N4FI相关器件

与CY81U016X16A9A-7N4FI相关文章

您还可以找

您在本页遇到什么问题？