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9301-11 PDF预览

9301-11

更新时间: 2024-01-12 05:03:05
品牌 Logo 应用领域
PSEMI 预分频器
页数 文件大小 规格书
7页 228K
描述
3500 MHz Low Power UltraCMOS Divide-by-2 Prescaler Rad-hard for Space Applications

9301-11 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:LSOP, SOP8,.4针数:8
Reach Compliance Code:compliant风险等级:5.62
系列:9301JESD-30 代码:S-CDSO-G8
逻辑集成电路类型:PRESCALER最大频率@ Nom-Sup:3500000000 Hz
数据/时钟输入次数:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:LSOP
封装等效代码:SOP8,.4封装形状:SQUARE
封装形式:SMALL OUTLINE电源:3 V
最大电源电流(ICC):15 mA认证状态:Not Qualified
座面最大高度:1.57 mm子类别:Prescaler/Multivibrators
最大供电电压 (Vsup):3.15 V最小供电电压 (Vsup):2.85 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

9301-11 数据手册

 浏览型号9301-11的Datasheet PDF文件第1页浏览型号9301-11的Datasheet PDF文件第2页浏览型号9301-11的Datasheet PDF文件第3页浏览型号9301-11的Datasheet PDF文件第5页浏览型号9301-11的Datasheet PDF文件第6页浏览型号9301-11的Datasheet PDF文件第7页 
PE9301  
Product Specification  
Figure 6. Evaluation Board Layout  
Peregrine specification 101/0034  
Evaluation Kit Operation  
The Ceramic SOIC Prescaler Evaluation Board was  
designed to help customers evaluate the PE9301  
divide-by-2 prescaler. On this board, the device  
input (pin 2) is connected to the SMA connector J1  
through a 50 transmission line. A series capacitor  
(C3) provides the necessary DC block for the device  
input. A value of 1000 pF was used for the  
evaluation board; other applications may require a  
different value. It is also possible to place a 0 ꢀ  
resistor in this location for very low frequency  
applications.  
The device output (pin 7) is connected to SMA  
connector J3 through a 50 transmission line. A  
series capacitor (C1) provides the necessary DC  
block for the device output. This capacitor value  
must be chosen to have a low impedance at the  
desired output frequency of the device. A value of  
1000 pF was chosen for the evaluation board.  
The board is constructed of a two-layer FR4 material  
with a total thickness of 0.031”. The bottom layer  
provides ground for the RF transmission lines. The  
transmission lines were designed using a coplanar  
waveguide above ground plane model with trace  
width of 0.030”, trace gaps of 0.0061”, dielectric  
thickness of 0.028”, metal thickness of 0.0014”, and  
εr of 4.6. Note that the predominate mode of these  
transmission lines is coplanar waveguide.  
J2 provides DC power to the device via pin 1. Two  
decoupling capacitors (C2=100 pF, C10=1000 pF)  
are included on this trace. It is the  
responsibility of the customer to  
determine proper supply  
Figure 7. Evaluation Board Schematic  
Peregrine specification 102/0062  
decoupling for their design  
application.  
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.  
Document No. 70-0039-02 UltraCMOS™ RFIC Solutions  
Page 4 of 7  

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