Datasheet > 8P004SRA1202I15

8P004SRA1202I15

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
WEDC		静态存储器
页数	文件大小	规格书
10页	111K
描述
SRAM Card, 2MX16, 150ns, CMOS, CADR1-68

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数据手册

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8P004SRA1202I15 数据手册

PCMCIA SRAM Memory Card

SRA Series

Write Timing Parameters

150ns

Min

SYM

Parameter

Max

Unit

(PCMCIA)

t_CW

Write Cycle Time

150

t_w(WE)

Write Pulse Width

t_su(A)

Address Setup Time

t_su(A-WEH)

t_su(CE-WEH)

t_su(D-WEH)

t_h(D)

Address Setup Time for WE#

Card Enable Setup Time for WE#

Data Setup Time for WE#

Data Hold Time

100

t_rec(WE)

t_dis(WE)

t_dis(OE)

Write Recover Time

Output Disable Time from WE#

Output Disable Time from OE#

Output Enable Time from WE#

Output Enable Time from OE#

Output Enable Setup from WE#

Output Enable Hold from WE#

Card Enable Setup Time from OE#

Card Enable Hold Time

t_en(WE)

t_dis(OE)

t_su(OE-WE)

t_h(OE-WE)

t_su(CE)

t_h(CE)

Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.

Write Timing Diagram

tc(W )

A [2 5 ::0 ], /R E G

tsu (A -W E H )

tre c (W E )

th (C E )

tsu (C E -W E H )

tsu (C E )

/C E 1 , /C E 2

N O T E

/O E

th (O E -W E )

th (D )

tw (W E )

tsu (A )

/W E

tsu (O E -W E )

tsu (D -W E H )

D [1 5 ::0 ](D in )

N O T E

D A T A IN P U T

td is (W E )

td is (O E )

te n (O E )

te n (W E )

N O T E

D [1 5 ::0 ](D o u t)

Notes:

1. Signal may be high or low in this area.

2. When the data I/O pins are in the output state, no signals shall be applied to the

data pins (D15 - D0) by the host system.

February 2002 Rev. 6

PC Card Products

1...4 5 678 9 10

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