Philips Semiconductors
Product specification
80C51 8-bit microcontroller family
8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer
80C575/83C575/
87C575
DESCRIPTION
FEATURES
PIN CONFIGURATIONS
The Philips 80C575/83C575/87C575 is a
high-performance microcontroller fabricated
with Philips high-density CMOS technology.
The Philips CMOS technology combines the
high speed and density characteristics of
HMOS with the low power attributes of
CMOS. Philips epitaxial substrate minimizes
latch-up sensitivity.
• 80C51 based architecture
– 8k × 8 ROM (83C575)
– 8k × 8 EPROM (87C575)
– ROMless (80C575)
– 256 × 8 RAM
40
39
38
37
1
2
3
V
CMP0+/P1.0/T2
DD
CMP0-/P1.1/T2EX
P0.0/AD0
P0.1/AD1
P0.2/AD2
ECI/P1.2
CMP0/CEX0/P1.3
CMP1/CEX1/P1.4
4
5
– Three 16-bit counter/timers
– Programmable Counter Array
– Enhanced UART
36 P0.3/AD3
35 P0.4/AD4
34 P0.5/AD5
The 8XC575 contains an 8k × 8 ROM
(83C575) EPROM (87C575), a 256 × 8 RAM,
32 I/O lines, three 16-bit counter/timers, a
Programmable Counter Array (PCA), a
seven-source, two-priority level nested
interrupt structure, an enhanced UART, four
analog comparators, power-fail detect and
oscillator fail detect circuits, and on-chip
oscillator and clock circuits.
CMP2/CEX2/P1.5
CMP3/CEX3/P1.6
CEX4/P1.7
6
7
8
9
– Boolean processor
– Oscillator fail detect
– Low active reset
33
32
31
P0.6/AD6
P0.7/AD7
RST
– Asynchronous low port reset
– Schmitt trigger inputs
– 4 analog comparators
– Watchdog timer
RxD/P3.0 10
TxD/P3.1 11
EA/V
PP
DUAL
IN-LINE
PACKAGE
30 ALE/PROG
29 PSEN
INT0/P3.2 12
In addition, the 8XC575 has a low active
reset, and the port pins are reset to a low
level. There is also a fully configurable
watchdog timer, and internal power on clear
circuit. The part includes idle mode and
power-down mode states for reduced power
consumption.
– Low V detect
CC
28
INT1/P3.3 13
P2.7/A15
• Memory addressing capability
– 64k ROM and 64k RAM
27 P2.6/A14
26 P2.5/A13
25 P2.4/A12
24 P2.3/A11
CMPR-/T0/P3.4 14
CMP1+/T1/P3.5 15
CMP2+/WR/P3.6 16
CMP3+/RD/P3.7 17
XTAL2 18
• Power control modes:
– Idle mode
– Power-down mode
23
22
P2.2/A10
P2.1/A9
P2.0/A8
• CMOS and TTL compatible
• 4.0 to 16MHz
XTAL1 19
21
20
V
SS
• Extended temperature ranges
• OTP package available
44
12
34
6
1
40
39
7
1
33
23
PQFP
LCC
17
11
29
18
28
22
SU00234
ORDERING INFORMATION
FREQ DRAWING
(MHz) NUMBER
1
ROMless
ROM
EPROM
TEMPERATURE RANGE °C AND PACKAGE
P80C575EBPN P83C575EBPN P87C575EBPN
P80C575EBAA P83C575EBAA P87C575EBAA
P80C575EHAA P83C575EHAA P87C575EHAA
P80C575EBBB P83C575EBBB P87C575EBBB
OTP
OTP
OTP
OTP
0 to +70, 40-Pin Plastic Dual In-line Package
0 to +70, 44-Pin Plastic Leaded Chip Carrier
–40 to +125, 44-Pin Plastic Leaded Chip Carrier
0 to +70, 44-Pin Plastic Quad Flat Pack
16
16
16
16
SOT129-1
SOT187-2
SOT187-2
SOT307-2
NOTE:
1. OTP - One Time Programmable EPROM.
2
1998 May 01
853-1684 19332
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