Datasheet > 853054AG

853054AG

更新时间： 2024-01-17 02:36:39

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管逻辑集成电路
页数	文件大小	规格书
16页	422K
描述
Multiplexer And Demux/Decoder, PDSO16

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853054AG 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	Reach Compliance Code：	not_compliant
HTS代码：	8542.39.00.01	风险等级：	5.92
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e0
逻辑集成电路类型：	MULTIPLEXER AND DEMUX/DECODER	湿度敏感等级：	1
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	225	电源：	2.5/3.3 V
Prop。Delay @ Nom-Sup：	0.625 ns	认证状态：	Not Qualified
子类别：	Clock Drivers	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn85Pb15)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
Base Number Matches：	1

853054AG 数据手册

DATA SHEET

PRELIMINARY

4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL

ICS853054

Integrated

ICS853054

CLOCK MULT^C^SIP^y^ir^s^cL^te^u^mE^it^sX^{, I}E^ncR^.

4:1, DIFFERENTIAL

TO-3.3V OR 2.5V

LVPECL/ECL CLOCK

ULTIPLEXER

GENERAL DESCRIPTION

FEATURES

The ICS853054 is an 4:1 Differential-to-3.3V or • High speed 4:1 differential multiplexer

ICS

HiPerClockS™

2.5V LVPECL/ECL Clock Multiplexer which

• One differential 3.3V or 2.5V LVPECL output

• Four selectable differential PCLK, nPCLK inputs

• PCLKx, nPCLKx pairs can accept the following

can operate up to 2.5GHz and is a member of

the HiPerClockS™ family of High Performance

Clock Solutions from ICS.The ICS853054 has 4

selectable differential clock inputs. The PCLKx, nPCLKx in-

put pairs can accept LVPECL, LVDS, CML or SSTL levels.

The fully differential architecture and low propagation

delay make it ideal for use in clock distribution circuits. The

select pins have internal pulldown resistors.The SEL1 pin is

the most significant bit and the binary number applied to the

select pins will select the same numbered data input (i.e., 00

selects PCLK0, nPCLK0).

differential input levels: LVPECL, LVDS, CML, SSTL

• Maximum output frequency: 3.2GHz

• Translates any single ended input signal to

LVPECL levels with resistor bias on nPCLKx input

• Part-to-part skew: TBD

• Propagation delay: 465ps (typical)

• Additive phase jitter, RMS: 0.238ps (typical)

• LVPECL mode operating voltage supply range:

V_CC= 2.375V to 3.465V, V_EE= 0V

• ECL mode operating voltage supply range:

V_CC= 0V, V_EE= -3.465V to -2.375V

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS-compliant

packages

BLOCK DIAGRAM

PIN ASSIGNMENT

PCLK0

nPCLK0

PCLK1

nPCLK1

V^CC

SEL0

SEL1

V^EE

V^CC

V^EE

nPCLK3

PCLK3

nPCLK2

PCLK2

PCLK0

nPCLK0

PCLK1

nPCLK1

PCLK2

nPCLK2

ICS853054

16-LeadTSSOP

PCLK3

nPCLK3

4.4mm x 5.0mm x 0.92mm package body

G Package

TopView

SEL0

SEL1

The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial

product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.

853054AG

www.icst.com/products/hiperclocks.html

REV.A JANUARY 5, 2006

IDT™ / ICS™ 4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER

ICS853054

12 3 4 5 6 7...16

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与853054AG相关器件

型号	品牌	描述	获取价格	数据表
853054AGLF	IDT	Multiplexer, 853054 Series, 1-Func, 4 Line Input, 1 Line Output, Complementary Output, PDS	获取价格
853054AGLFT	IDT	Multiplexer, 853054 Series, 1-Func, 4 Line Input, 1 Line Output, Complementary Output, PDS	获取价格
853054AGT	IDT	Multiplexer And Demux/Decoder, PDSO16	获取价格
853054AL	ICSI	4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER	获取价格
853058AG	IDT	Multiplexer, 853058 Series, 1-Func, 8 Line Input, 1 Line Output, Complementary Output, PDS	获取价格
853058AGLFT	IDT	Multiplexer, 853058 Series, 1-Func, 8 Line Input, 1 Line Output, Complementary Output, PDS	获取价格

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