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853058AGLFT PDF预览

853058AGLFT

更新时间: 2024-02-10 09:39:28
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管逻辑集成电路
页数 文件大小 规格书
18页 697K
描述
Multiplexer, 853058 Series, 1-Func, 8 Line Input, 1 Line Output, Complementary Output, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MS-153, TSSOP-24

853058AGLFT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 X 7.80 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MS-153, TSSOP-24
针数:24Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.83
其他特性:ECL MODE: VEE=-2.375V TO -3.465V AT VCC=0V系列:853058
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:7.8 mm逻辑集成电路类型:MULTIPLEXER
湿度敏感等级:1功能数量:1
输入次数:8输出次数:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:+-2.5/+-3.3 VProp。Delay @ Nom-Sup:0.45 ns
传播延迟(tpd):0.45 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

853058AGLFT 数据手册

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8:1, DIFFERENTIAL-TO-3.3V or 2.5V  
LVPECL/ECL CLOCK MULTIPLEXER  
ICS853058  
General Description  
Features  
he ICS853058 is an 8:1 Differential-to-3.3V or 2.5V  
High speed 8:1 differential muliplexer  
S
IC  
LVPECL / ECL Clock Multiplexer which can operate  
up to 2.8GHz and is a member of the HiPerClockS™  
family of High Performance Clock Solutions from  
IDT. The ICS853058 has 8 differential selectable  
One differential 3.3V or 2.5V LVPECL output  
HiPerClockS™  
Eight selectable differential PCLKx/nPCLKx input pairs  
Differential PCLKx/nPCLKx pairs can accept the following  
interface levels: LVPECL, LVDS, CML, SSTL  
clock inputs. The PCLK, nPCLK input pairs can accept LVPECL,  
LVDS, CML or SSTL levels. The fully differential architecture and  
low propagation delay make it ideal for use in clock distribution  
circuits. The select pins have internal pulldown resistors. The  
SEL2 pin is the most significant bit and the binary number applied  
to the select pins will select the same numbered data input (i.e.,  
000 selects PCLK0, nPCLK0).  
Maximum output frequency: 2.8GHz  
Translates any single ended input signal to LVPECL levels with  
resistor bias on nPCLKx input  
RMS phase jitter @ 155.52MHz: 0.212ps (typical)  
Part-to-part skew: 325ps (maximum)  
Propagation delay: 450ps (maximum)  
LVPECL mode operating voltage supply range:  
VCC = 2.375V to 3.465V, VEE = 0V  
ECL mode operating voltage supply range:  
VCC = 0V, VEE = -3.465V to -2.375V  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
Block Diagram  
Pin Assignment  
PCLK7  
Pulldown  
24  
1
PCLK0  
PCLK0  
nPCLK0  
Pullup/Pulldown  
0 0 0  
0 0 1  
2
23  
nPCLK7  
PCLK6  
nPCLK6  
nPCLK0  
PCLK1  
nPCLK1  
3
4
22  
21  
Pulldown  
PCLK1  
nPCLK1  
Pullup/Pulldown  
5
6
7
20  
19  
18  
17  
VCC  
Q
nQ  
VCC  
SEL0  
SEL1  
Q
nQ  
Pulldown  
PCLK2  
Pullup/Pulldown  
0 1 0  
0 1 1  
nPCLK2  
SEL2  
8
V
EE  
9
PCLK2  
nPCLK2  
PCLK3  
16  
15  
14  
13  
PCLK5  
nPCLK5  
PCLK4  
nPCLK4  
Pulldown  
PCLK3  
10  
11  
12  
Pullup/Pulldown  
nPCLK3  
nPCLK3  
Pulldown  
PCLK0  
nPCLK0  
1 0 0  
1 0 1  
Pullup/Pulldown  
ICS853S057I  
Pulldown  
PCLK1  
nPCLK1  
24-Lead TSSOP  
4.4mm x 7.8mm x 0.925mm  
package body  
Pullup/Pulldown  
Pulldown  
PCLK2  
Pullup/Pulldown  
1 1 0  
1 1 1  
nPCLK2  
G Package  
Top View  
Pulldown  
PCLK3  
Pullup/Pulldown  
nPCLK3  
SEL1 SEL1 SEL0  
IDT™ / ICS™ 3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER  
1
ICS853058AG REV. A MAY 12, 2008  

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