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85304AGI-01LFT PDF预览

85304AGI-01LFT

更新时间: 2024-02-19 08:57:52
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
15页 216K
描述
Low Skew, 1-to-5, Differential-To-3.3V LVPECL Fanout Buffer

85304AGI-01LFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:End Of Life零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.75
系列:85304输入调节:DIFFERENTIAL MUX
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:6.5 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:20
实输出次数:10最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:2.1 ns传播延迟(tpd):2.1 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.06 ns
座面最大高度:1.2 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mm最小 fmax:650 MHz
Base Number Matches:1

85304AGI-01LFT 数据手册

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Low Skew, 1-to-5, Differential-To-  
3.3V LVPECL Fanout Buffer  
ICS85304I-01  
DATASHEET  
General Description  
Features  
Five 3.3V differential LVPECL output pairs  
Selectable differential CLKx, nCLKx input pairs  
The ICS85304I-01 is a low skew, high performance 1-to-5  
Differential-to-3.3V LVPECL fanout buffer. The ICS85304I-01 has  
two selectable clock inputs. The CLKx, nCLKx pairs can accept most  
standard differential input levels. The clock enable is internally  
synchronized to eliminate runt clock pulses on the outputs during  
asynchronous assertion/ deassertion of the clock enable pin.  
CLKx, nCLKx input pairs can accept the following differential  
levels: LVDS, LVPECL, LVHSTL and HCSL levels  
Maximum output frequency: 650MHz  
Translates any single-ended input signal to 3.3V LVPECL levels  
Guaranteed output and part-to-part skew characteristics make the  
ICS85304I-01 ideal for those applications demanding well defined  
performance and repeatability.  
with resistor bias on nCLKx inputs  
Output skew: 60ps (maximum)  
Part-to-part skew: 300ps (maximum)  
Propagation delay: 2.1ns (maximum)  
Full 3.3V supply mode  
-40°C to 85°C ambient operating temperature  
Lead-free (RoHS 6) package  
Block Diagram  
Pullup  
Pin Assignment  
CLK_EN  
D
Q0  
nQ0  
Q1  
1
2
20  
19  
VCC  
CLK_EN  
Q
3
18  
VCC  
LE  
Pulldown  
Pullup  
CLK0  
nCLK0  
nQ1  
4
17  
nCLK1  
0
Q0  
Q2  
nQ2  
Q3  
5
6
7
8
9
16 CLK1  
15  
14  
13  
VEE  
nQ0  
Pulldown  
Pullup  
CLK1  
nCLK1  
nCLK0  
CLK0  
1
nQ3  
Q1  
Q4  
12 CLK_SEL  
11  
nQ1  
Pulldown  
CLK_SEL  
nQ4 10  
VCC  
Q2  
nQ2  
ICS85304I-01  
Q3  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.925mm  
package body  
nQ3  
Q4  
G Package  
Top View  
nQ4  
ICS85304AGI-01 REVISION A FEBRUARY 4, 2013  
1
©2013 Integrated Device Technology, Inc.  

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