Datasheet > 8408501XA

8408501XA

更新时间： 2024-11-25 23:25:35

品牌	Logo	应用领域
其他 - ETC		总线收发器逻辑集成电路
页数	文件大小	规格书
17页	96K
描述
Bus Transceiver

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数据手册

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8408501XA 数据手册

REVISIONS

LTR

DESCRIPTION

DATE (YR-MO-DA)

00-07-18

APPROVED

Add vendor CAGE F8859. Add device class V criteria. Correct data limits in

paragraph 1.3. Add table III, delta limits. Add case outline X. Update

boilerplate. - jak

Monica L. Poelking

Correct table II. Update boilerplate to MIL-PRF-38535 requirements. – jak

02-02-14

Thomas M. Hess

First page of this drawing has been changed

CURRENT CAGE CODE 67268

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

REV

SHEET

PMIC N/A

PREPARED BY

Donald R. Osborne

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216

http://www.dscc.dla.mil

STANDARD

MICROCIRCUIT

DRAWING

CHECKED BY

D. A. DiCenzo

APPROVED BY

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL

BUS TRANSCEIVER WITH THREE-STATE OUTPUTS,

MONOLITHIC SILICON

N. A. Hauck

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

DRAWING APPROVAL DATE

84-11-01

AMSC N/A

REVISION LEVEL

SIZE

CAGE CODE

84085

14933

SHEET

DSCC FORM 2233

APR 97

5962-E208-02

DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.

12 3 4 5 6 7...17

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与8408501XA相关器件

型号	品牌	获取价格	描述	数据表
8408501XC	ETC	获取价格	Bus Transceiver
84088012A	TI	获取价格	DUAL J-NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
84088012C	ETC	获取价格	J-K-Type Flip-Flop
84088012X	TI	获取价格	HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20, CE
8408801EA	TI	获取价格	DUAL J-NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
8408801EX	ETC	获取价格	J-K-Type Flip-Flop
8408801FA	TI	获取价格	DUAL J-NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
8408801FX	ETC	获取价格	J-K-Type Flip-Flop
84089012A	TI	获取价格	QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
84089012C	ETC	获取价格	Quad D-Type Flip-Flop