Datasheet > 82V3352TFG8

82V3352TFG8

更新时间： 2024-02-13 07:12:26

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
125页	1460K
描述
Telecom IC, PQFP64

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

82V3352TFG8 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.34
JESD-30 代码：	S-PQFP-G64	JESD-609代码：	e3
湿度敏感等级：	3	端子数量：	64
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP64,.47SQ,20	封装形状：	SQUARE
封装形式：	FLATPACK	电源：	3.3 V
认证状态：	Not Qualified	子类别：	Other Telecom ICs
最大压摆率：	436 mA	标称供电电压：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
Base Number Matches：	1

82V3352TFG8 数据手册

SYNCHRONOUS ETHERNET

WAN PLL

IDT82V3352

•

Supports automatic hitless selected input clock switch on clock fail-

ure

Supports three types of input clock sources: recovered clock from

STM-N or OC-n, PDH network synchronization timing and external

synchronization reference timing

Provides three 2 kHz, 4 kHz or 8 kHz frame sync input signals, and

a 2 kHz and an 8 kHz frame sync output signals

Provides 5 input clocks whose frequency cover from 2 kHz to

622.08 MHz

Provides 2 output clocks whose frequency cover from 1 Hz to

622.08 MHz

FEATURES

HIGHLIGHTS

•

The first single PLL chip:

• Features 0.1 Hz to 560 Hz bandwidth

• Provides node clock for ITU-T G.8261/G.8262 Synchronous

Ethernet

• Exceeds GR-253-CORE (OC-12) and ITU-T G.813 (STM-16/

Option I) jitter generation requirements

•

• Provides node clocks for Cellular and WLL base-station (GSM

and 3G networks)

• Provides clocks for DSL access concentrators (DSLAM), espe-

cially for Japan TCM-ISDN network timing based ADSL equip-

ments

•

Provides output clocks for BITS, GPS, 3G, GSM, etc.

Supports PECL/LVDS and CMOS input/output technologies

Supports master clock calibration

Supports Line Card application

Meets Telcordia GR-1244-CORE, GR-253-CORE, ITU-T G.812,

ITU-T G.813 and ITU-T G.783 criteria

MAIN FEATURES

•

Provides an integrated single-chip solution for Synchronous Equip-

ment Timing Source, including Stratum 3, SMC, 4E and 4 clocks

Employs DPLL and APLL to feature excellent jitter performance

and minimize the number of the external components

Supports Forced or Automatic operating mode switch controlled by

an internal state machine; the primary operating modes are Free-

Run, Locked and Holdover

OTHER FEATURES

•

Serial microprocessor interface mode

IEEE 1149.1 JTAG Boundary Scan

Single 3.3 V operation with 5 V tolerant CMOS I/Os

64-pin TQFP package, Green package options available

•

Supports programmable DPLL bandwidth (0.1 Hz to 560 Hz in 11

steps) and damping factor (1.2 to 20 in 5 steps)

APPLICATIONS

•

BITS / SSU

-5

-8

•

Supports 1.1X10 ppm absolute holdover accuracy and 4.4X10

ppm instantaneous holdover accuracy

SMC / SEC (SONET / SDH)

DWDM cross-connect and transmission equipments

Synchronous Ethernet equipments

Supports PBO to minimize phase transients on T0 DPLL output to

be no more than 0.61 ns

Supports phase absorption when phase-time changes on T0

selected input clock are greater than a programmable limit over an

interval of less than 0.1 seconds

Supports programmable input-to-output phase offset adjustment

Limits the phase and frequency offset of the outputs

Supports manual and automatic selected input clock switch

Central Office Timing Source and Distribution

Core and access IP switches / routers

Gigabit and Terabit IP switches / routers

IP and ATM core switches and access equipments

Cellular and WLL base-station node clocks

Broadband and multi-service access equipments

Any other telecom equipments that need synchronous equipment

system timing

•

IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.

March 23, 2009

 2009 Integrated Device Technology, Inc.

DSC-7212/3

1...4 5 678 9 10...125

下载PDF

与82V3352TFG8相关器件

型号	品牌	描述	获取价格	数据表
82V3355DK	IDT	Telecom Circuit, 1-Func, CMOS, PQFP64, TQFP-64	获取价格
82V3355DKG	IDT	Telecom Circuit, 1-Func, CMOS, PQFP64, GREEN TQFP-64	获取价格
82V3355DKG8	IDT	Telecom Circuit, 1-Func, PQFP64, GREEN, TQFP-64	获取价格
82V3358EDG	IDT	SYNCHRONOUS ETHERNET WAN PLL	获取价格
82V3358TF	IDT	SYNCHRONOUS ETHERNET WAN PLL	获取价格
82V3358TFG	IDT	SYNCHRONOUS ETHERNET WAN PLL	获取价格

与82V3352TFG8相关文章

STM32F030C6芯片介绍：主要参数分析、引脚配置说明、功耗及封装
2024-05-11

9
PCF8591数据手册解读：参数、引脚说明
2024-05-11

13
一文带你了解ss8050参数、引脚配置、应用指南
2024-05-11

7
深入解析AD7606高性能多通道模数转换器：资料手册参数分析
2024-05-10

9

产品中心

服务支持

精选活动

关于我们

帮助中心

82V3352TFG8

82V3352TFG8 技术参数

82V3352TFG8 数据手册

与82V3352TFG8相关器件

与82V3352TFG8相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

82V3352TFG8

82V3352TFG8 技术参数

82V3352TFG8 数据手册

与82V3352TFG8相关器件

与82V3352TFG8相关文章

您还可以找

您在本页遇到什么问题？