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813252DKI-02LF PDF预览

813252DKI-02LF

更新时间: 2024-02-20 04:15:55
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
23页 1268K
描述
Clock Generator, 312.5MHz, 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32

813252DKI-02LF 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.23JESD-30 代码:S-XQCC-N32
长度:5 mm端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:312.5 MHz封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE主时钟/晶体标称频率:155.52 MHz
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

813252DKI-02LF 数据手册

 浏览型号813252DKI-02LF的Datasheet PDF文件第2页浏览型号813252DKI-02LF的Datasheet PDF文件第3页浏览型号813252DKI-02LF的Datasheet PDF文件第4页浏览型号813252DKI-02LF的Datasheet PDF文件第5页浏览型号813252DKI-02LF的Datasheet PDF文件第6页浏览型号813252DKI-02LF的Datasheet PDF文件第7页 
®
ICS813252DI-02  
VCXO Jitter Attenuator & FemtoClock Multiplier  
DATA SHEET  
General Description  
Features  
The ICS813252DI-02 is a PLL based synchronous multiplier that is  
optimized for PDH or SONET to Ethernet clock jitter attenuation and  
frequency translation. The device contains two internal frequency  
multiplication stages that are cascaded in series. The first stage is a  
VCXO PLL that is optimized to provide reference clock jitter  
attenuation. The second stage is a FemtoClock® frequency multiplier  
that provides the low jitter, high frequency Ethernet output clock that  
easily meets Gigabit and 10 Gigabit Ethernet jitter requirements.  
Pre-divider and output divider multiplication ratios are selected using  
device selection control pins. The multiplication ratios are optimized  
to support most common clock rates used in PDH, SONET and  
Ethernet applications. The VCXO requires the use of an external,  
inexpensive pullable crystal. The VCXO uses external passive loop  
filter components which allows configuration of the PLL loop  
bandwidth and damping characteristics. The device is packaged in a  
space-saving 32-VFQFN package and supports industrial  
temperature range.  
Two LVPECL outputs  
Each output supports independent frequency selection at 25MHz,  
125MHz, 156.25MHz and 312.5MHz  
Two differential inputs support the following input types: LVPECL,  
LVDS, LVHSTL, SSTL, HCSL  
Accepts input frequencies from 8kHz to 155.52MHz including  
8kHz, 1.544MHz, 2.048MHz, 19.44MHz, 25MHz, 77.76MHz,  
125MHz and 155.52MHz  
Attenuates the phase jitter of the input clock by using a low-cost  
pullable fundamental mode VCXO crystal  
VCXO PLL bandwidth can be optimized for jitter attenuation and  
reference tracking using external loop filter connection  
FemtoClock frequency multiplier provides low jitter, high  
frequency output  
Absolute pull range: 50ppm  
FemtoClock VCO frequency: 625MHz  
RMS phase jitter @125MHz, using a 25MHz crystal  
(10kHz - 20MHz): 1.04ps (typical)  
3.3V supply voltage  
-40°C to 85°C ambient operating temperature  
Available in lead-free (RoHS 6) package  
Pin Assignment  
32 31 30 29 28 27 26 25  
24  
LF1  
LF0  
VEE  
1
23 nQB  
2
3
22  
ISET  
QB  
VEE  
VCCO  
nQA  
4
5
21  
20  
CLK_SEL  
VCC  
6
7
8
QA  
19  
18  
17  
RESERVED  
VEE  
VEE  
ODASEL_0  
9
10 11 12 13 14 15 16  
ICS813252DI-02  
32 Lead VFQFN  
5mm x 5mm x 0.925mm package body  
K Package  
Top View  
ICS813252DKI-02 REVISION A JANUARY 25, 2011  
1
©2011 Integrated Device Technology, Inc.  

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