Datasheet > 80C52-16

80C52-16

更新时间： 2024-01-14 14:21:02

品牌	Logo	应用领域
TEMIC		/
页数	文件大小	规格书
20页	221K
描述
CMOS 0 to 44 MHz Single Chip 8?bit Microntroller

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技术参数
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80C52-16 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	DIP, DIP40,.6	Reach Compliance Code：	unknown
风险等级：	5.83	Is Samacsys：	N
位大小：	8	CPU系列：	8051
JESD-30 代码：	R-XDIP-T40	JESD-609代码：	e0
端子数量：	40	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	CERAMIC
封装代码：	DIP	封装等效代码：	DIP40,.6
封装形状：	RECTANGULAR	封装形式：	IN-LINE
电源：	5 V	认证状态：	Not Qualified
RAM（字节）：	256	ROM（单词）：	8192
ROM可编程性：	MROM	筛选级别：	38535Q/M;38534H;883B
速度：	16 MHz	子类别：	Microcontrollers
最大压摆率：	39 mA	标称供电电压：	5 V
表面贴装：	NO	技术：	CMOS
温度等级：	MILITARY	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	Base Number Matches：	1

80C52-16 数据手册

80C32/80C52

1 FFFH). When EA is held low, the CPU executes only out

of external Program Memory. EA must not be floated.

PSEN

Program Store Enable output is the read strobe to external

Program Memory. PSEN is activated twice each machine

cycle during fetches from external Program Memory.

(However, when executing out of external Program

Memory, two activations of PSEN are skipped during

each access to external Data Memory). PSEN is not

activated during fetches from internal Program Memory.

PSEN can sink/source 8 LS TTL inputs. It can drive

CMOS inputs without an external pullup.

XTAL1

Input to the inverting amplifier that forms the oscillator.

Receives the external oscillator signal when an external

oscillator is used.

XTAL2

Output of the inverting amplifier that forms the oscillator.

This pin should be floated when an external oscillator is

used.

When EA is held high, the CPU executes out of internal

Program Memory (unless the Program Counter exceeds

Idle And Power Down Operation

Figure 3 shows the internal Idle and Power Down clock

configuration. As illustrated, Power Down operation

stops the oscillator. Idle mode operation allows the

interrupt, serial port, and timer blocks to continue to

function, while the clock to the CPU is gated off.

Symbol

Position

Name and Function

SMOD

PCON.7

Double Baud rate bit. When set to

a 1, the baud rate is doubled when

the serial port is being used in

either modes 1, 2 or 3.

(Reserved)

–

GF1

GF0

PCON.6

PCON.5

PCON.4

PCON.3

PCON.2

PCON.1

These special modes are activated by software via the

Special Function Register, PCON. Its hardware address is

87H. PCON is not bit addressable.

(Reserved)

General-purpose flag bit.

Power Down bit. Setting this bit

activates power down operation.

Idle mode bit. Setting this bit

activates idle mode operation.

Figure 3.Idle and Power Down Hardware.

IDL

PCON.0

If 1’s are written to PD and IDL at the same time. PD

takes, precedence. The reset value of PCON is

(000X0000).

Idle Mode

The instruction that sets PCON.0 is the last instruction

executed before the Idle mode is activated. Once in the

Idle mode the CPU status is preserved in its entirety : the

Stack Pointer, Program Counter, Program Status Word,

Accumulator, RAM and all other registers maintain their

data during idle. Table 1 describes the status of the

external pins during Idle mode.

PCON : Power Control Register

(MSB)

SMOD

(LSB)

IDL

–

GF1

GF0

MATRA MHS

Rev. G (14 Jan. 97)

1 2 3 456 7 8...20

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与80C52-16相关器件

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80C52-16D	TEMIC	CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller	获取价格
80C52-16R	TEMIC	CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller	获取价格
80C52-20	TEMIC	CMOS 0 to 44 MHz Single Chip 8?bit Microntroller	获取价格
80C52-20D	TEMIC	CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller	获取价格

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