Datasheet > 80C51X2

80C51X2

更新时间： 2022-11-28 23:28:31

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
62页	400K
描述
80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz

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80C51X2 数据手册

Philips Semiconductors

Product data

80C51 8-bit microcontroller family

4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),

low power, high speed (30/33 MHz)

P80C3xX2; P80C5xX2;

P87C5xX2

FEATURES

• 80C51 Central Processing Unit

• PLCC, DIP, TSSOP or LQFP packages

• Extended temperature ranges

• Dual Data Pointers

– 4 kbytes ROM/EPROM (P80/P87C51X2)

– 8 kbytes ROM/EPROM (P80/P87C52X2)

– 16 kbytes ROM/EPROM (P80/P87C54X2)

– 32 kbytes ROM/EPROM (P80/P87C58X2)

– 128 byte RAM (P80/P87C51X2 and P80C31X2)

– 256 byte RAM (P80/P87C52/54X2/58X2 and P80C32X2)

– Boolean processor

• Security bits:

– ROM (2 bits)

– OTP (3 bits)

• Encryption array - 64 bytes

• Four interrupt priority levels

• Six interrupt sources

– Fully static operation

– Low voltage (2.7 V to 5.5 V at 16 MHz) operation

• 12-clock operation with selectable 6-clock operation (via software

• Four 8-bit I/O ports

or via parallel programmer)

• Full-duplex enhanced UART

– Framing error detection

• Memory addressing capability

– Up to 64 kbytes ROM and 64 kbytes RAM

– Automatic address recognition

• Power control modes:

– Clock can be stopped and resumed

– Idle mode

• Three 16-bit timers/counters T0, T1 (standard 80C51) and

additional T2 (capture and compare)

• Programmable clock-out pin

• Asynchronous port reset

– Power-down mode

• CMOS and TTL compatible

• Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock

• Two speed ranges at V = 5 V

mode)

– 0 to 30 MHz with 6-clock operation

• Wake-up from Power Down by an external interrupt.

– 0 to 33 MHz with 12-clock operation

2003 Jan 24

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