8XC52/54/58
pins that are externally pulled low will source current
(I , on the data sheet) because of the internal pull-
PIN DESCRIPTIONS
IL
ups.
V
V
V
: Supply voltage.
CC
Port 2 emits the high-order address byte during
fetches from external Program Memory and during
accesses to external Data Memory that use 16-bit
: Circuit ground.
SS
: Secondary ground (not on DIP). Provided to
SS1
@
addresses (MOVX DPTR). In this application it
uses strong internal pullups when emitting 1’s. Dur-
ing accesses to external Data Memory that use 8-bit
reduce ground bounce and improve power supply
by-passing.
@
addresses (MOVX Ri), Port 2 emits the contents of
the P2 Special Function Register.
NOTE:
This pin is not a substitute for the V pin (pin 22).
SS
(Connection not necessary for proper operation.)
Some Port 2 pins receive the high-order address bits
during EPROM programming and program verifica-
tion.
Port 0: Port 0 is an 8-bit, open drain, bidirectional
I/O port. As an output port each pin can sink several
LS TTL inputs. Port 0 pins that have 1’s written to
them float, and in that state can be used as high-im-
pedance inputs.
Port 3: Port 3 is an 8-bit bidirectional I/O port with
internal pullups. The Port 3 output buffers can drive
LS TTL inputs. Port 3 pins that have 1’s written to
them are pulled high by the internal pullups, and in
that state can be used as inputs. As inputs, Port 3
pins that are externally pulled low will source current
Port 0 is also the multiplexed low-order address and
data bus during accesses to external Program and
Data Memory. In this application it uses strong inter-
nal pullups when emitting 1’s, and can source and
sink several LS TTL inputs.
(I , on the data sheet) because of the pullups.
IL
Port 3 also serves the functions of various special
features of the 8051 Family, as listed below:
Port 0 also receives the code bytes during EPROM
programming, and outputs the code bytes during
program verification. External pullup resistors are re-
quired during program verification.
Port Pin
Alternate Function
RXD (serial input port)
TXD (serial output port)
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Port 1: Port 1 is an 8-bit bidirectional I/O port with
internal pullups. The Port 1 output buffers can drive
LS TTL inputs. Port 1 pins that have 1’s written to
them are pulled high by the internal pullups, and in
that state can be used as inputs. As inputs, Port 1
pins that are externally pulled low will source current
INT0 (external interrupt 0)
INT1 (external interrupt 1)
T0 (Timer 0 external input)
T1 (Timer 1 external input)
WR (external data memory write strobe)
RD (external data memory read strobe)
(I , on the data sheet) because of the internal pull-
IL
ups.
In addition, Port 1 serves the functions of the follow-
ing special features of the 8XC5X:
RST: Reset input. A high on this pin for two machine
cycles while the oscillator is running resets the de-
vice. The port pins will be driven to their reset condi-
tion when a minimum V voltage is applied whether
IHI
the oscillator is running or not. An internal pulldown
resistor permits a power-on reset with only a capaci-
Port Pin
Alternate Function
P1.0
T2 (External Count Input to Timer/
Counter 2), Clock-Out
tor connected to V
.
CC
P1.1
T2EX (Timer/Counter 2 Capture/
Reload Trigger and Direction Control)
ALE: Address Latch Enable output pulse for latching
the low byte of the address during accesses to ex-
ternal memory. This pin (ALE/PROG) is also the
program pulse input during EPROM programming for
the 87C5X.
Port 1 receives the low-order address bytes during
EPROM programming and verifying.
Port 2: Port 2 is an 8-bit bidirectional I/O port with
internal pullups. The Port 2 output buffers can drive
LS TTL inputs. Port 2 pins that have 1’s written to
them are pulled high by the internal pullups, and in
that state can be used as inputs. As inputs, Port 2
In normal operation ALE is emitted at a constant
rate of (/6 the oscillator frequency, and may be used
for external timing or clocking purposes. Note, how-
ever, that one ALE pulse is skipped during each ac-
cess to external Data Memory.
4
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