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78M6613-IMR/F/PSU

更新时间： 2024-02-09 02:20:39

品牌	Logo	应用领域
TERIDIAN		闪存传感器
页数	文件大小	规格书
33页	742K
描述
Power Supply Management Circuit, Fixed, 1 Channel, 5 X 5 MM, ROHS COMPLIANT, QFN-32

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78M6613-IMR/F/PSU 技术参数

是否无铅：	含铅	生命周期：	Transferred
包装说明：	5 X 5 MM, ROHS COMPLIANT, QFN-32	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.67	Is Samacsys：	N
可调阈值：	NO	模拟集成电路 - 其他类型：	POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码：	S-XQCC-N32	长度：	5 mm
信道数量：	1	功能数量：	1
端子数量：	32	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	NOT SPECIFIED
座面最大高度：	0.9 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	5 mm	Base Number Matches：	1

78M6613-IMR/F/PSU 数据手册

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78M6613 Data Sheet

DS_6613_018

1.2 Analog Front End (AFE)

The AFE of the 78M6613 is comprised of an input multiplexer, a delta-sigma A/D converter and a

voltage reference.

1.2.1 Input Multiplexer

The input multiplexer supports up to four input signals that are applied to pins A0, A1, A2 and A3 of the

device. Additionally, using the alternate mux selection, it has the ability to select the on-chip

temperature sensor. The multiplexer can be operated in two modes:

•

During a normal multiplexer cycle, the signals from the A0, A2, A1, and A3 pins are selected.

During the alternate multiplexer cycle, the temperature signal (TEMP) is selected, along with the

signal sources shown in Table 1.

The alternate mux cycles are usually performed infrequently (e.g. every second) by the MPU. Table 1

details the regular and alternative MUX sequences. Missing samples due to an ALT multiplexer

sequence are filled in by the CE.

Table 1: Inputs Selected in Regular and Alternate Multiplexer Cycles

Regular MUX Sequence

Mux State

ALT MUX Sequence

Mux State

TEMP

V3P3D

In a typical application, A1 and A3 are connected to current sensors that sense the current on each

branch of the line voltage. A0 and A2 are typically connected to voltage sensors through resistor

dividers. The multiplexer control circuit is clocked by CK32, the 32.768 kHz clock from the PLL block,

and launches with each new pass of the CE program.

1.2.2 A/D Converter (ADC)

A single delta-sigma A/D converter digitizes the voltage and current inputs to the 78M6613. The

resolution of the ADC is 22 bits. Conversion time is two cycles of the CK32 clock.

Initiation of each ADC conversion is controlled by the multiplexer control circuit as described previously.

At the end of each ADC conversion, the FIR filter output data is stored into the CE DRAM location.

1.2.3 FIR Filter

The finite impulse response filter is an integral part of the ADC and it is optimized for use with the

multiplexer. The purpose of the FIR filter is to decimate the ADC output to the desired resolution. At the

end of each ADC conversion, the output data is stored into the fixed CE DRAM location determined by

the multiplexer selection.

1.2.4 Voltage References

The device includes an on-chip precision bandgap voltage reference that incorporates auto-zero

techniques. The reference is trimmed to minimize errors caused by component mismatch and drift. The

result is a voltage output with a predictable temperature coefficient.

Rev. 1.1

1...3 4 567 8 9...33

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型号	品牌	描述	获取价格	数据表
78M6613-IMR/F/PW4	MAXIM	Power Supply Management Circuit, Fixed, 1 Channel, 5 X 5 MM, ROHS COMPLIANT, QFN-32	获取价格
78M6613-IMR/F/PW5	MAXIM	Power Supply Management Circuit, Fixed, 1 Channel, 5 X 5 MM, ROHS COMPLIANT, QFN-32	获取价格
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78M6618-IM/F	MAXIM	Analog Circuit, 1 Func, CMOS, 8 X 8 MM, TQFN-68	获取价格

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