7805ALPRPDE

更新时间： 2024-02-27 06:11:28

品牌	Logo	应用领域
麦斯威 - MAXWELL		转换器模数转换器
页数	文件大小	规格书
18页	264K
描述
16-Bit Latchup Protected ADC

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技术参数
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7805ALPRPDE 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
零件包装代码：	MODULE	包装说明：	,
针数：	3	Reach Compliance Code：	unknown
ECCN代码：	EAR99	风险等级：	5.55
Is Samacsys：	N	模拟集成电路 - 其他类型：	DC-DC REGULATED POWER SUPPLY MODULE
最大输入电压：	36 V	最小输入电压：	7.5 V
标称输入电压：	12 V	JESD-30 代码：	R-XSMA-T3
JESD-609代码：	e3	功能数量：	1
输出次数：	1	端子数量：	3
最高工作温度：	70 °C	最低工作温度：	-40 °C
最大输出电压：	5.075 V	最小输出电压：	4.925 V
标称输出电压：	5 V	封装主体材料：	UNSPECIFIED
封装形状：	RECTANGULAR	封装形式：	MICROELECTRONIC ASSEMBLY
认证状态：	Not Qualified	表面贴装：	NO
技术：	HYBRID	温度等级：	OTHER
端子面层：	Tin (Sn)	端子形式：	THROUGH-HOLE
端子位置：	SINGLE	微调/可调输出：	NO
Base Number Matches：	1

7805ALPRPDE 数据手册

7805ALP

16-Bit Latchup Protected ADC

TABLE 1. 7805ALP PINOUT DESCRIPTION

PIN NUMBER

NAME

DIGITAL I/O DESCRIPTION

Analog input.

AGND1

REF

Analog ground. Used internally as ground reference point.

Reference input/output. 2.2 µF tantalum capacitor to ground

CAP

Reference buffer capacitor. 2.2 µF tantalum capacitor to ground.

Analog ground.

AGND2

D15 (MSB)

Data bit 15. Most Significant Bit (MSB) of conversion results. When STATUS is

HIGH*, D15 must not be driven high.

D14

D13

D12

D11

D10

Data bit 14. When STATUS is HIGH*, D14 must not be driven high.

Data bit 13. When STATUS is HIGH*, D13 must not be driven high.

Data bit 12. When STATUS is HIGH*, D12 must not be driven high.

Data bit 11. When STATUS is HIGH*, D11 must not be driven high.

Data bit 10. When STATUS is HIGH*, D10 must not be driven high.

Data bit 9. When STATUS is HIGH*, D9 must not be driven high.

Data bit 8. When STATUS is HIGH*, D8 must not be driven high.

Digital Ground

DGND

Data bit 7. When STATUS is HIGH*, D7 must not be driven high.

Data bit 6. When STATUS is HIGH*, D6 must not be driven high.

Data bit 5. When STATUS is HIGH*, D5 must not be driven high.

Data bit 4. When STATUS is HIGH*, D4 must not be driven high.

Data bit 3. When STATUS is HIGH*, D3 must not be driven high.

Data bit 2. When STATUS is HIGH*, D2 must not be driven high.

Data bit 1. When STATUS is HIGH*, D1 must not be driven high.

D0 (LSB)

Data bit 0. Least Significant Bit (LSB) of conversion results. When STATUS is

HIGH*, D0 must not be driven high.

STATUS*

R/C

STATUS when HIGH indicates latchup protection is active and output data is

invalid. Capacitive loading should not exceed 1000 pF.

With CS LOW and BUSY HIGH, a falling edge of R/C initiates a new conversion.

When STATUS is HIGH*, CS and R/C must not be driven high.

Internally OR’d with R/C. If R/C LOW, a falling edge on CS initiates a new conver-

sion. When STATUS is HIGH*, CS and R/C must not be driven high.

BUSY

DECPLNG

At the start of a conversion, BUSY goes LOW and stays LOW until the conversion

is completed and the digital outputs have been updated.

Supply voltage high speed decoupling pin. Decouple to ground with 1.0 µF ceramic

capacitor.

Supply input. Nominally 5V. Decouple to ground with 10 µF tantalum capacitor.

01.10.05 Rev 9

All data sheets are subject to change without notice

123 4 5 6 7...18

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