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74HCT5555DB-T

更新时间： 2024-01-29 10:52:14

品牌	Logo	应用领域
恩智浦 - NXP		振荡器
页数	文件大小	规格书
23页	146K
描述
IC SPECIALTY ANALOG CIRCUIT, PDSO16, Analog IC:Other

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74HCT5555DB-T 技术参数

Philips Semiconductors

Product speciﬁcation

Programmable delay timer with oscillator

74HC/HCT5555

TEST MODE

Set S₃to a logic LOW level, this will divide the 24 stage counter into three, parallel clocking, 8-stage counters. Set S₀,

S₁and S₂to a logic HIGH level, this programs the counter to divide-by 2⁸(256). Apply a trigger pulse and clock in 255

pulses, this sets all flip-flop stages to a logic HIGH level. Set S₃to a logic HIGH level, this causes the counter to divide-by

2²⁴. Clock one more pulse into the RS input, this causes a logic 0 to ripple through the counter and output Q/Q goes from

HIGH-to-LOW level. This method of testing the delay counter is faster than clocking in 2²⁴(16 777 216) clock pulses.

FUNCTION TABLE

INPUTS

OUTPUTS

↑

one HIGH level

output pulse

one LOW level

output pulse

↓

one HIGH level

output pulse

one LOW level

output pulse

Notes

1. H = HIGH voltage level

L = LOW voltage level

X = don't care

↑ = LOW-to-HIGH transition

↓ = HIGH-to-LOW transition.

September 1993

1...3 4 567 8 9...23

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