74HCT4353D

更新时间： 2024-02-18 17:52:53

品牌	Logo	应用领域
恩智浦 - NXP		复用器
页数	文件大小	规格书
16页	139K
描述
Triple 2-channel analog multiplexer/demultiplexer with latch

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Philips Semiconductors

Product speciﬁcation

Triple 2-channel analog

multiplexer/demultiplexer with latch

74HC/HCT4353

multiplexer has two independent inputs/outputs (nY₀and

nY₁), a common input/output (nZ) and select inputs (S₁to

S₃).

FEATURES

• Wide analog input voltage range: ± 5 V

• Low “ON” resistance:

Each multiplexer/demultiplexer contains two bidirectional

analog switches, each with one side connected to an

independent input/output (nY₀and nY₁) and the other side

connected to a common input/output (nZ).

80 Ω (typ.) at V_CC− V_EE= 4.5 V

70 Ω (typ.) at V_CC− V_EE= 6.0 V

60 Ω (typ.) at V_CC− V_EE= 9.0 V

• Logic level translation:

With E₁LOW and E₂HIGH, one of the two switches is

selected (low impedance ON-state) by S₁to S₃.

The data at the select inputs may be latched by using the

active LOW latch enable input (LE). When LE is HIGH, the

latch is transparent. When either of the two enable inputs,

E₁(active LOW) and E₂(active HIGH), is inactive, all

analog switches are turned off.

to enable 5 V logic to communicate with ± 5 V analog

signals

• Typical “break before make” built in

• Address latches provided

• Output capability: non-standard

• I_CCcategory: MSI

_CCand GND are the supply voltage pins for the digital

control inputs (S₁to S₃, LE, E₁and E₂). The V_CCto GND

ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.

The analog inputs/outputs (nY₀and nY₁, and nZ) can

swing between V_CCas a positive limit and V_EEas a

negative limit. V_CC− V_EEmay not exceed 10.0 V.

GENERAL DESCRIPTION

The 74HC/HCT4353 are high-speed Si-gate CMOS

devices. They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT4353 are triple 2-channel analog

multiplexers/demultiplexers with two common enable

inputs (E₁and E₂) and a latch enable input (LE). Each

For operation as a digital multiplexer/demultiplexer, V_EEis

connected to GND (typically ground).

QUICK REFERENCE DATA

_EE= GND = 0 V; T_amb= 25 °C; t_r= t_f= 6 ns

TYPICAL

SYMBOL

PARAMETER

CONDITIONS

UNIT

HCT

_PZH/ t_PZL

turn “ON” time E₁, E₂or S_nto V_os

turn “OFF” time E₁, E₂or S_nto V_os

input capacitance

C_L= 50 pF; R_L= 1 kΩ; 29

V_CC= 5 V

t_PHZ/ t_PLZ

C_I

3.5

C_PD

power dissipation capacitance per switch

max. switch capacitance

independent (Y)

notes 1 and 2

C_S

common (Z)

Notes

∑ {(C_L×C_S) × V_CC²× f_o} = sum of outputs

V_CC= supply voltage in V

1. C_PDis used to determine the dynamic power

dissipation (P_Din µW):

2. For HC the condition is V_I= GND to V_CC

P_D=

For HCT the condition is V_I= GND to V_CC− 1.5 V

_PD× V_CC²× f_i+ ∑ {(C_L+ C_S) × V_CC²× f_o} where:

f_i= input frequency in MHz

ORDERING INFORMATION

C_L= output load capacitance in pF

f_o= output frequency in MHz

C_S= max. switch capacitance in pF

See “74HC/HCT/HCU/HCMOS Logic Package

Information”.

December 1990

123 4 5 6 7...16

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与74HCT4353D相关器件

型号	品牌	描述	获取价格	数据表
74HCT4353D,112	NXP	74HC(T)4353 - Triple 2-channel analog multiplexer/demultiplexer with latch SOP 20-Pin	获取价格
74HCT4353D,118	NXP	74HC(T)4353 - Triple 2-channel analog multiplexer/demultiplexer with latch SOP 20-Pin	获取价格
74HCT4353DB	NXP	IC TRIPLE 1-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20, Multiplexer or Switch	获取价格
74HCT4353DB-T	NXP	IC TRIPLE 1-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20, Multiplexer or Switch	获取价格
74HCT4353D-T	ETC	2-Channel Analog Multiplexer	获取价格
74HCT4353N	NXP	Triple 2-channel analog multiplexer/demultiplexer with latch	获取价格

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