Datasheet > 74HCT4067PW,118

74HCT4067PW,118

更新时间： 2024-02-08 11:21:23

品牌	Logo	应用领域
恩智浦 - NXP		光电二极管
页数	文件大小	规格书
29页	158K
描述
74HC(T)4067 - 16-channel analog multiplexer/demultiplexer TSSOP2 24-Pin

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74HCT4067PW,118 技术参数

生命周期：	Active	零件包装代码：	TSSOP2
包装说明：	TSSOP,	针数：	24
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	0.72	模拟集成电路 - 其他类型：	SINGLE-ENDED MULTIPLEXER
JESD-30 代码：	R-PDSO-G24	JESD-609代码：	e4
长度：	7.8 mm	湿度敏感等级：	1
信道数量：	16	功能数量：	1
端子数量：	24	标称断态隔离度：	50 dB
通态电阻匹配规范：	9 Ω	最大通态电阻 (Ron)：	180 Ω
最高工作温度：	125 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	1.1 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	4.5 V
表面贴装：	YES	最长断开时间：	83 ns
最长接通时间：	90 ns	技术：	CMOS
温度等级：	AUTOMOTIVE	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	4.4 mm	Base Number Matches：	1

74HC4067; 74HCT4067

16-channel analog multiplexer/demultiplexer

Rev. 03 — 15 October 2007

Product data sheet

1. General description

The 74HC4067; 74HCT4067 is a high-speed Si-gate CMOS device and is pin compatible

with the HEF4067B. The device is speciﬁed in compliance with JEDEC standard no. 7A.

The 74HC4067; 74HCT4067 is a 16-channel analog multiplexer/demultiplexer with four

address inputs (S0 to S3), an active-LOW enable input (E), sixteen independent

inputs/outputs (Y0 to Y15) and a common input/output (Z).

The 74HC4067; 74HCT4067 contains sixteen bidirectional analog switches, each with

one side connected to an independent input/output (Y0 to Y15) and the other side

connected to a common input/output (Z).

With pin E = LOW, one of the sixteen switches is selected by pins S0 to S3 (low

impedance ON-state). All unselected switches are in the high-impedance OFF-state.

With pin E = HIGH, all switches are in the high-impedance OFF-state, independent of pins

S0 to S3.

The analog inputs/outputs (Y0 to Y15, and Z) can swing between V_CCas a positive limit

and GND as a negative limit. V_CCto GND may not exceed 10 V.

2. Features

I Low ON resistance:

N 80 Ω (typical) at V_CC= 4.5 V

N 70 Ω (typical) at V_CC= 6.0 V

N 60 Ω (typical) at V_CC= 9.0 V

I Typical ‘break before make’ built-in

3. Applications

I Analog multiplexing and demultiplexing

I Digital multiplexing and demultiplexing

I Signal gating

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