Datasheet > 74HCT4051BQ-Q100,1

74HCT4051BQ-Q100,1

更新时间： 2024-01-08 14:47:41

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
31页	325K
描述
74HC(T)4051-Q100 - 8-channel analog multiplexer/demultiplexer QFN 16-Pin

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74HCT4051BQ-Q100,1 技术参数

生命周期：	Active	零件包装代码：	QFN
包装说明：	DHVQFN-16	针数：	16
Reach Compliance Code：	compliant	风险等级：	5.78
Base Number Matches：	1

74HCT4051BQ-Q100,1 数据手册

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74HC4051-Q100; 74HCT4051-Q100

8-channel analog multiplexer/demultiplexer

Rev. 2 — 8 October 2012

Product data sheet

1. General description

The 74HC4051-Q100; 74HCT4051-Q100 is a high-speed Si-gate CMOS device and is pin

compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance

with JEDEC standard no. 7A.

The 74HC4051-Q100; 74HCT4051-Q100 is an 8-channel analog

multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable

input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z).

With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2.

With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.

V_CCand GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).

The V_CCto GND ranges are 2.0 V to 10.0 V for 74HC4051-Q100 and 4.5 V to 5.5 V for

74HCT4051-Q100. The analog inputs/outputs (Y0 to Y7, and Z) can swing between V_CC

as a positive limit and V_EEas a negative limit. V_CC V_EEmay not exceed 10.0 V. For

operation as a digital multiplexer/demultiplexer, V_EEis connected to GND (typically

ground).

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Wide analog input voltage range from 5 V to +5 V

 Low ON resistance:

 80  (typical) at V_CC V_EE= 4.5 V

 70  (typical) at V_CC V_EE= 6.0 V

 60  (typical) at V_CC V_EE= 9.0 V

 Logic level translation: to enable 5 V logic to communicate with 5 V analog signals

 Typical ‘break before make’ built-in

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )

 CDM AEC-Q100-011 revision B exceeds 1000 V

 Multiple package options

12 3 4 5 6 7...31

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